u-boot/arch/arm/dts/rk3328-evb-u-boot.dtsi
Jagan Teki b71f74eab4 arm64: dts: rockchip: Drop unused rk3328-xhci node
rk3328-xhci has been added due to the fact that the upstream
dwc3 is unsupported. Moreover, the driver for rk3328-xhci is
not added to the code tree.

By considering these facts and unsupported rk3328-xhci this
patch is dropping all related code from DT. However, the DWC3
is fixed now in dwc3-generic and RK3328 USB 3.0 is functional
in upcoming patches.

Let's drop it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd
*/
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr3-666.dtsi"
/{
gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "gmac_clkin";
#clock-cells = <0>;
};
vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc5v0_host_xhci";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
&gmac2io {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
tx_delay = <0x26>;
rx_delay = <0x11>;
status = "okay";
};
&gmac2phy {
/* Integrated PHY unsupported by U-Boot */
status = "broken";
};