u-boot/arch/arm/dts/ast2600-evb.dts
Joel Stanley a2f16d0073 ARM: dts: ast2600: Add HACE to device tree
Add HACE DTS node and enable it for AST2600 EVB.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:00 -05:00

184 lines
2.9 KiB
Text

// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "ast2600-u-boot.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
chosen {
stdout-path = &uart5;
};
aliases {
mmc0 = &emmc_slot0;
mmc1 = &sdhci_slot0;
mmc2 = &sdhci_slot1;
spi0 = &fmc;
spi1 = &spi1;
spi2 = &spi2;
ethernet0 = &mac0;
ethernet1 = &mac1;
ethernet2 = &mac2;
ethernet3 = &mac3;
};
cpus {
cpu@0 {
clock-frequency = <800000000>;
};
cpu@1 {
clock-frequency = <800000000>;
};
};
};
&uart5 {
u-boot,dm-pre-reloc;
status = "okay";
};
&sdrammc {
clock-frequency = <400000000>;
};
&wdt1 {
status = "okay";
};
&fmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fmcquad_default>;
flash@0 {
compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
flash@1 {
compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
flash@2 {
compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
flash@0 {
compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&spi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
flash@0 {
compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&emmc {
u-boot,dm-pre-reloc;
timing-phase = <0x700ff>;
};
&emmc_slot0 {
u-boot,dm-pre-reloc;
status = "okay";
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_default>;
sdhci-drive-type = <1>;
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
};
&i2c5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_default>;
};
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7_default>;
};
&i2c7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
};
&i2c8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
};
&scu {
mac0-clk-delay = <0x1d 0x1c
0x10 0x17
0x10 0x17>;
mac1-clk-delay = <0x1d 0x10
0x10 0x10
0x10 0x10>;
mac2-clk-delay = <0x0a 0x04
0x08 0x04
0x08 0x04>;
mac3-clk-delay = <0x0a 0x04
0x08 0x04
0x08 0x04>;
};
&hace {
u-boot,dm-pre-reloc;
status = "okay";
};