mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-16 16:23:14 +00:00
e162c6b1a7
Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors. This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
104 lines
2.4 KiB
C
104 lines
2.4 KiB
C
/*
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* (C) Copyright 2014, Xilinx, Inc
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*
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* USB Low level initialization(Specific to zynq)
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <usb.h>
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#include <usb/ehci-ci.h>
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#include <usb/ulpi.h>
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#include "ehci.h"
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#define ZYNQ_USB_USBCMD_RST 0x0000002
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#define ZYNQ_USB_USBCMD_STOP 0x0000000
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#define ZYNQ_USB_NUM_MIO 12
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*/
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int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
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struct ehci_hcor **hcor)
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{
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struct usb_ehci *ehci;
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struct ulpi_viewport ulpi_vp;
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int ret, mio_usb;
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/* Used for writing the ULPI data address */
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struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
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if (!index) {
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mio_usb = zynq_slcr_get_mio_pin_status("usb0");
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if (mio_usb != ZYNQ_USB_NUM_MIO) {
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printf("usb0 wrong num MIO: %d, Index %d\n", mio_usb,
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index);
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return -1;
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}
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR0;
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} else {
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mio_usb = zynq_slcr_get_mio_pin_status("usb1");
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if (mio_usb != ZYNQ_USB_NUM_MIO) {
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printf("usb1 wrong num MIO: %d, Index %d\n", mio_usb,
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index);
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return -1;
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}
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR1;
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}
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*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
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HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
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ulpi_vp.port_num = 0;
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ret = ulpi_init(&ulpi_vp);
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if (ret) {
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puts("zynq ULPI viewport init failed\n");
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return -1;
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}
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/* ULPI set flags */
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ulpi_write(&ulpi_vp, &ulpi->otg_ctrl,
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ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN |
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ULPI_OTG_EXTVBUSIND);
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ulpi_write(&ulpi_vp, &ulpi->function_ctrl,
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ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL |
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ULPI_FC_SUSPENDM);
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ulpi_write(&ulpi_vp, &ulpi->iface_ctrl, 0);
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/* Set VBus */
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ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set,
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ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
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return 0;
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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{
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struct usb_ehci *ehci;
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if (!index)
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR0;
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else
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR1;
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/* Stop controller */
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writel(ZYNQ_USB_USBCMD_STOP, &ehci->usbcmd);
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udelay(1000);
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/* Initiate controller reset */
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writel(ZYNQ_USB_USBCMD_RST, &ehci->usbcmd);
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return 0;
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}
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