mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-17 08:43:07 +00:00
73cc2f50eb
Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
37 lines
1.2 KiB
Text
37 lines
1.2 KiB
Text
CORENET_DS BOARD
|
|
#M: -
|
|
S: Maintained
|
|
F: board/freescale/corenet_ds/
|
|
F: include/configs/P3041DS.h
|
|
F: configs/P3041DS_defconfig
|
|
F: configs/P3041DS_NAND_defconfig
|
|
F: configs/P3041DS_SDCARD_defconfig
|
|
F: configs/P3041DS_SECURE_BOOT_defconfig
|
|
F: configs/P3041DS_SPIFLASH_defconfig
|
|
F: configs/P3041DS_SRIO_PCIE_BOOT_defconfig
|
|
F: include/configs/P4080DS.h
|
|
F: configs/P4080DS_defconfig
|
|
F: configs/P4080DS_SDCARD_defconfig
|
|
F: configs/P4080DS_SECURE_BOOT_defconfig
|
|
F: configs/P4080DS_SPIFLASH_defconfig
|
|
F: configs/P4080DS_SRIO_PCIE_BOOT_defconfig
|
|
F: include/configs/P5020DS.h
|
|
F: configs/P5020DS_defconfig
|
|
F: configs/P5020DS_NAND_defconfig
|
|
F: configs/P5020DS_SDCARD_defconfig
|
|
F: configs/P5020DS_SECURE_BOOT_defconfig
|
|
F: configs/P5020DS_SPIFLASH_defconfig
|
|
F: configs/P5020DS_SRIO_PCIE_BOOT_defconfig
|
|
F: include/configs/P5040DS.h
|
|
F: configs/P5040DS_defconfig
|
|
F: configs/P5040DS_NAND_defconfig
|
|
F: configs/P5040DS_SDCARD_defconfig
|
|
F: configs/P5040DS_SPIFLASH_defconfig
|
|
F: configs/P5040DS_SECURE_BOOT_defconfig
|
|
|
|
CORENET_DS_SECURE_BOOT BOARD
|
|
M: Aneesh Bansal <aneesh.bansal@freescale.com>
|
|
S: Maintained
|
|
F: configs/P3041DS_NAND_SECURE_BOOT_defconfig
|
|
F: configs/P5020DS_NAND_SECURE_BOOT_defconfig
|
|
F: configs/P5040DS_NAND_SECURE_BOOT_defconfig
|