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There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> |
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| .. | ||
| clock.h | ||
| crm_regs.h | ||
| gpio.h | ||
| hab.h | ||
| imx-regs.h | ||
| iomux.h | ||
| mx6-ddr.h | ||
| mx6-pins.h | ||
| mx6dl-ddr.h | ||
| mx6dl_pins.h | ||
| mx6q-ddr.h | ||
| mx6q_pins.h | ||
| mx6sl-ddr.h | ||
| mx6sl_pins.h | ||
| mx6sx-ddr.h | ||
| mx6sx_pins.h | ||
| mx6ul-ddr.h | ||
| mx6ul_pins.h | ||
| mxc_hdmi.h | ||
| sys_proto.h | ||