mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 02:51:00 +00:00
174d728471
Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
36 lines
602 B
Text
36 lines
602 B
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* dts file for Xilinx ZynqMP ZCU102 Rev1.0
|
|
*
|
|
* (C) Copyright 2016 - 2020, Xilinx, Inc.
|
|
*
|
|
* Michal Simek <michal.simek@amd.com>
|
|
*/
|
|
|
|
#include "zynqmp-zcu102-revB.dts"
|
|
|
|
/ {
|
|
model = "ZynqMP ZCU102 Rev1.0";
|
|
compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
|
|
};
|
|
|
|
&eeprom {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
board_sn: board-sn@0 {
|
|
reg = <0x0 0x14>;
|
|
};
|
|
|
|
eth_mac: eth-mac@20 {
|
|
reg = <0x20 0x6>;
|
|
};
|
|
|
|
board_name: board-name@d0 {
|
|
reg = <0xd0 0x6>;
|
|
};
|
|
|
|
board_revision: board-revision@e0 {
|
|
reg = <0xe0 0x3>;
|
|
};
|
|
};
|