mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 19:10:13 +00:00
167efc2c7a
Sync rk3399 dts(i) files from v5.7-rc1 linux-next. Reason: To get updated PCIe nodes and properties on respective dts(i) files. Summary: - sync won't include new board dts(i) - sync will add required files used on respective dts(i) - rk3399-puma-u-boot.dtsi spiflash label changed to norflash - move puma.dtsi bios_enable into rk3399-puma-u-boot.dtsi - move legacy max-frequency of sdhci into rk3399-u-boot.dtsi - update cross-ec-[keyboard|sbs].dtsi path as per U-Boot - keep roc-rk3399-pc dc_12v changes to -u-boot.dtsi Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
89 lines
1.7 KiB
Text
89 lines
1.7 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Google Gru-Bob Rev 4+ board device tree source
|
|
*
|
|
* Copyright 2018 Google, Inc
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "rk3399-gru-chromebook.dtsi"
|
|
|
|
/ {
|
|
model = "Google Bob";
|
|
compatible = "google,bob-rev13", "google,bob-rev12",
|
|
"google,bob-rev11", "google,bob-rev10",
|
|
"google,bob-rev9", "google,bob-rev8",
|
|
"google,bob-rev7", "google,bob-rev6",
|
|
"google,bob-rev5", "google,bob-rev4",
|
|
"google,bob", "google,gru", "rockchip,rk3399";
|
|
|
|
edp_panel: edp-panel {
|
|
compatible = "boe,nv101wxmn51";
|
|
backlight = <&backlight>;
|
|
power-supply = <&pp3300_disp>;
|
|
|
|
port {
|
|
panel_in_edp: endpoint {
|
|
remote-endpoint = <&edp_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&ap_i2c_ts {
|
|
touchscreen: touchscreen@10 {
|
|
compatible = "elan,ekth3500";
|
|
reg = <0x10>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&touch_int_l &touch_reset_l>;
|
|
reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
&ap_i2c_tp {
|
|
trackpad: trackpad@15 {
|
|
compatible = "elan,ekth3000";
|
|
reg = <0x15>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&trackpad_int_l>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
&backlight {
|
|
pwms = <&cros_ec_pwm 0>;
|
|
};
|
|
|
|
&cpu_alert0 {
|
|
temperature = <65000>;
|
|
};
|
|
|
|
&cpu_alert1 {
|
|
temperature = <70000>;
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
cr50@0 {
|
|
compatible = "google,cr50";
|
|
reg = <0>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <5 IRQ_TYPE_EDGE_RISING>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&h1_int_od_l>;
|
|
spi-max-frequency = <800000>;
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
tpm {
|
|
h1_int_od_l: h1-int-od-l {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|