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https://github.com/AsahiLinux/u-boot
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aef54ea16c
Now that individual 2.5Gbps SGMII support has been added to mtk-eth, all boards that use 2.5Gbps link with mt7531 must be converted to use "2500base-x" instead of "sgmii". Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
178 lines
3.1 KiB
Text
178 lines
3.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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*/
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/dts-v1/;
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#include "mt7986.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mt7986-rfb";
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compatible = "mediatek,mt7986", "mediatek,mt7986-rfb",
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"mediatek,mt7986-sd-rfb";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x10000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "disabled";
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <0>;
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phy-mode = "2500base-x";
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mediatek,switch = "mt7531";
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reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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};
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};
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&pinctrl {
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spi_flash_pins: spi0-pins-func-1 {
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mux {
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function = "flash";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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spic_pins: spi1-pins-func-1 {
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mux {
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function = "spi";
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groups = "spi1_2";
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};
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};
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uart1_pins: spi1-pins-func-3 {
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mux {
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function = "uart";
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groups = "uart1_2";
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};
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};
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pwm_pins: pwm0-pins-func-1 {
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mux {
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function = "pwm";
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groups = "pwm0";
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};
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};
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mmc0_pins_default: mmc0default {
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mux {
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function = "flash";
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groups = "emmc_45";
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input-schmitt-enable;
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};
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conf-cmd-dat {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
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"SPI0_CS", "SPI0_HOLD", "SPI0_WP",
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"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
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input-enable;
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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conf-clk {
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pins = "SPI1_CS";
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drive-strength = <MTK_DRIVE_6mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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conf-rst {
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pins = "PWM1";
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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};
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};
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&spi0 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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must_tx;
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enhance_timing;
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dma_ext;
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ipm_design;
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support_quad;
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tick_dly = <2>;
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sample_sel = <0>;
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spi_nor@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <52000000>;
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};
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spi_nand@1 {
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compatible = "spi-nand";
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reg = <1>;
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spi-max-frequency = <52000000>;
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_pins>;
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status = "okay";
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};
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&watchdog {
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status = "disabled";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins_default>;
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bus-width = <4>;
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max-frequency = <52000000>;
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cap-sd-highspeed;
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r_smpl = <1>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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status = "okay";
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};
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