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cd1978719c
Add DTS files for Pogoplug V4 board Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Pali Rohár <pali@kernel.org>
180 lines
3.1 KiB
Text
180 lines
3.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
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* inspired by the board files made by Kevin Mihelich for ArchLinux,
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* and their DTS file.
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*
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* Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
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*/
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/dts-v1/;
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#include "kirkwood.dtsi"
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#include "kirkwood-6192.dtsi"
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#include <dt-bindings/input/linux-event-codes.h>
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/ {
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model = "Cloud Engines PogoPlug Series 4";
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compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
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"marvell,kirkwood";
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memory {
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device_type = "memory";
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reg = <0x00000000 0x08000000>;
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};
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chosen {
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stdout-path = "uart0:115200n8";
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pmx_button_eject>;
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pinctrl-names = "default";
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eject {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <KEY_EJECTCD>;
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label = "Eject Button";
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gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&pmx_led_green &pmx_led_red>;
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pinctrl-names = "default";
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health {
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label = "pogoplugv4:green:health";
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gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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fault {
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label = "pogoplugv4:red:fault";
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gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&pinctrl {
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pmx_sata0: pmx-sata0 {
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marvell,pins = "mpp21";
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marvell,function = "sata0";
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};
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pmx_sata1: pmx-sata1 {
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marvell,pins = "mpp20";
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marvell,function = "sata1";
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};
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pmx_sdio_cd: pmx-sdio-cd {
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marvell,pins = "mpp27";
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marvell,function = "gpio";
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};
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pmx_sdio_wp: pmx-sdio-wp {
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marvell,pins = "mpp28";
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marvell,function = "gpio";
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};
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pmx_button_eject: pmx-button-eject {
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marvell,pins = "mpp29";
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marvell,function = "gpio";
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};
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pmx_led_green: pmx-led-green {
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marvell,pins = "mpp22";
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marvell,function = "gpio";
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};
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pmx_led_red: pmx-led-red {
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marvell,pins = "mpp24";
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marvell,function = "gpio";
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};
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};
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&uart0 {
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status = "okay";
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};
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/*
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* This PCIE controller has a USB 3.0 XHCI controller at 1,0
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*/
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&pciec {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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&sata {
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status = "okay";
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pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
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pinctrl-names = "default";
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nr-ports = <1>;
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};
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&sdio {
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status = "okay";
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pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
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pinctrl-names = "default";
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cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
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};
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&nand {
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/* 128 MiB of NAND flash */
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chip-delay = <40>;
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x00000000 0x200000>;
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read-only;
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};
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partition@200000 {
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label = "uImage";
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reg = <0x00200000 0x300000>;
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};
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partition@500000 {
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label = "uImage2";
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reg = <0x00500000 0x300000>;
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};
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partition@800000 {
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label = "failsafe";
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reg = <0x00800000 0x800000>;
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};
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partition@1000000 {
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label = "root";
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reg = <0x01000000 0x7000000>;
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};
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};
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};
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&mdio {
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status = "okay";
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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ð0 {
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status = "okay";
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ethernet0-port@0 {
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phy-handle = <ðphy0>;
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};
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};
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