mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-10 05:13:31 +00:00
01f573eb88
Sync all am642-evm/am642-sk related DT files with Linux v6.5-rc1. - drop timer1 in favor of main_timer0 in am64-main.dtsi. Need to delete clock & power domain properties of main_timer1 in -r5.dts else won't boot. This is because timer_init is done during rproc_start to start System Firmware, but we can't do any clock/power-domain operations before System Firmware starts. - same constraint applies to main_uart0 - drop cpsw3g custom DT property 'mac_efuse' and custom DT node cpsw-phy-sel as driver picks these from standard property/node. - include board dts file in -r5 dts file to avoid duplication of nodes. Include -u-boot.dtsi on top. - drop duplicate nodes in -r5 dts and -u-boot.dtsi Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
165 lines
1.7 KiB
Text
165 lines
1.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "k3-am64x-binman.dtsi"
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/ {
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chosen {
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tick-timer = &main_timer0;
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};
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memory@80000000 {
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bootph-pre-ram;
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};
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};
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&cbass_main{
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bootph-pre-ram;
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};
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&cbass_mcu {
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bootph-pre-ram;
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};
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&main_timer0 {
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bootph-pre-ram;
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clock-frequency = <200000000>;
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};
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&main_conf {
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bootph-pre-ram;
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chipid@14 {
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bootph-pre-ram;
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};
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};
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&main_pmx0 {
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bootph-pre-ram;
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};
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&main_i2c0_pins_default {
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bootph-pre-ram;
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};
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&main_i2c0 {
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bootph-pre-ram;
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};
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&main_uart0_pins_default {
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bootph-pre-ram;
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};
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&main_uart0 {
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bootph-pre-ram;
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};
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&dmss {
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bootph-pre-ram;
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};
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&secure_proxy_main {
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bootph-pre-ram;
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};
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&dmsc {
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bootph-pre-ram;
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k3_sysreset: sysreset-controller {
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compatible = "ti,sci-sysreset";
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bootph-pre-ram;
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};
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};
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&k3_pds {
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bootph-pre-ram;
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};
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&k3_clks {
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bootph-pre-ram;
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};
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&k3_reset {
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bootph-pre-ram;
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};
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&sdhci0 {
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status = "disabled";
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bootph-pre-ram;
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};
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&sdhci1 {
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bootph-pre-ram;
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};
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&main_mmc1_pins_default {
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bootph-pre-ram;
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};
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&cpsw3g {
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bootph-pre-ram;
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ethernet-ports {
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bootph-pre-ram;
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};
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};
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&cpsw_port2 {
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bootph-pre-ram;
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};
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&main_bcdma {
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bootph-pre-ram;
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};
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&main_pktdma {
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bootph-pre-ram;
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};
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&rgmii1_pins_default {
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bootph-pre-ram;
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};
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&rgmii2_pins_default {
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bootph-pre-ram;
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};
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&mdio1_pins_default {
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bootph-pre-ram;
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};
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&cpsw3g_phy1 {
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bootph-pre-ram;
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};
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&main_usb0_pins_default {
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bootph-pre-ram;
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};
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&serdes_ln_ctrl {
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u-boot,mux-autoprobe;
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};
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&usbss0 {
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bootph-pre-ram;
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};
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&usb0 {
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bootph-pre-ram;
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};
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&serdes_wiz0 {
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bootph-pre-ram;
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};
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&serdes0_usb_link {
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bootph-pre-ram;
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};
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&serdes0 {
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bootph-pre-ram;
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};
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&serdes_refclk {
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bootph-pre-ram;
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};
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