mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 02:51:00 +00:00
cd9a3e3f90
Synchronise device trees with linux v6.5-rc1. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
160 lines
2.5 KiB
Text
160 lines
2.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright 2022 Toradex
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*/
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/ {
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sound_card: sound-card {
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compatible = "simple-audio-card";
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simple-audio-card,bitclock-master = <&dailink_master>;
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&dailink_master>;
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "imx8mm-nau8822";
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simple-audio-card,routing =
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"Headphones", "LHP",
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"Headphones", "RHP",
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"Speaker", "LSPK",
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"Speaker", "RSPK",
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"Line Out", "AUXOUT1",
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"Line Out", "AUXOUT2",
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"LAUX", "Line In",
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"RAUX", "Line In",
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"LMICP", "Mic In",
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"RMICP", "Mic In";
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simple-audio-card,widgets =
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"Headphones", "Headphones",
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"Line Out", "Line Out",
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"Speaker", "Speaker",
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"Microphone", "Mic In",
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"Line", "Line In";
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dailink_master: simple-audio-card,codec {
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clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
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sound-dai = <&nau8822_1a>;
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};
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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};
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};
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};
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/* Verdin SPI_1 */
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&ecspi2 {
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status = "okay";
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};
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/* EEPROM on display adapter boards */
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&eeprom_display_adapter {
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status = "okay";
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};
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/* EEPROM on Verdin Development board */
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&eeprom_carrier_board {
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status = "okay";
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};
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&fec1 {
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status = "okay";
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};
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/* Verdin QSPI_1 */
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&flexspi {
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status = "okay";
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};
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/* Current measurement into module VCC */
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&hwmon {
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status = "okay";
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};
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&hwmon_temp {
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vs-supply = <®_1p8v>;
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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&gpio_expander_21 {
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status = "okay";
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};
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/* Verdin I2C_1 */
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&i2c4 {
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status = "okay";
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/* Audio Codec */
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nau8822_1a: audio-codec@1a {
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compatible = "nuvoton,nau8822";
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reg = <0x1a>;
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#sound-dai-cells = <0>;
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};
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};
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/* Verdin PCIE_1 */
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&pcie0 {
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status = "okay";
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};
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&pcie_phy {
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status = "okay";
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};
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/* Verdin PWM_3_DSI */
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&pwm1 {
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status = "okay";
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};
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/* Verdin PWM_1 */
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&pwm2 {
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status = "okay";
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};
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/* Verdin PWM_2 */
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&pwm3 {
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status = "okay";
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};
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/* Verdin I2S_1 */
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&sai2 {
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status = "okay";
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};
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/* Verdin UART_3 */
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&uart1 {
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status = "okay";
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};
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/* Verdin UART_1, connector X50 through RS485 transceiver */
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&uart2 {
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linux,rs485-enabled-at-boot-time;
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rs485-rts-active-low;
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rs485-rx-during-tx;
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status = "okay";
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};
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/* Verdin UART_2 */
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&uart3 {
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status = "okay";
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};
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/* Verdin USB_1 */
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&usbotg1 {
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disable-over-current;
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status = "okay";
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};
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/* Verdin USB_2 */
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&usbotg2 {
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disable-over-current;
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status = "okay";
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};
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/* Limit frequency on dev board due to long traces and bad signal integrity */
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&usdhc2 {
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max-frequency = <100000000>;
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status = "okay";
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};
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