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https://github.com/AsahiLinux/u-boot
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dd83840e5e
Import DTS files and dt-bindings includes from Linux 4.8-rc1. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
346 lines
8.7 KiB
Text
346 lines
8.7 KiB
Text
/*
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* Copyright (c) 2016 Andreas Färber
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/meson-gxbb-gpio.h>
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#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
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/ {
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compatible = "amlogic,meson-gxbb";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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reg = <0x0 0x1>;
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enable-method = "psci";
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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reg = <0x0 0x2>;
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enable-method = "psci";
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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reg = <0x0 0x3>;
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enable-method = "psci";
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};
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};
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arm-pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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cbus: cbus@c1100000 {
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compatible = "simple-bus";
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reg = <0x0 0xc1100000 0x0 0x100000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
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reset: reset-controller@4404 {
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compatible = "amlogic,meson-gxbb-reset";
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reg = <0x0 0x04404 0x0 0x20>;
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#reset-cells = <1>;
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};
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uart_A: serial@84c0 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x84c0 0x0 0x14>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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uart_B: serial@84dc {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x84dc 0x0 0x14>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x8700 0x0 0x14>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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};
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gic: interrupt-controller@c4301000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xc4301000 0 0x1000>,
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<0x0 0xc4302000 0 0x2000>,
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<0x0 0xc4304000 0 0x2000>,
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<0x0 0xc4306000 0 0x2000>;
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interrupt-controller;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
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#interrupt-cells = <3>;
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#address-cells = <0>;
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};
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aobus: aobus@c8100000 {
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compatible = "simple-bus";
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reg = <0x0 0xc8100000 0x0 0x100000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
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pinctrl_aobus: pinctrl@14 {
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compatible = "amlogic,meson-gxbb-aobus-pinctrl";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gpio_ao: bank@14 {
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reg = <0x0 0x00014 0x0 0x8>,
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<0x0 0x0002c 0x0 0x4>,
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<0x0 0x00024 0x0 0x8>;
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reg-names = "mux", "pull", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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};
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uart_ao_a_pins: uart_ao_a {
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mux {
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groups = "uart_tx_ao_a", "uart_rx_ao_a";
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function = "uart_ao";
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};
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};
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};
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uart_AO: serial@4c0 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x004c0 0x0 0x14>;
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interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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};
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periphs: periphs@c8834000 {
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compatible = "simple-bus";
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reg = <0x0 0xc8834000 0x0 0x2000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
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rng {
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compatible = "amlogic,meson-rng";
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reg = <0x0 0x0 0x0 0x4>;
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};
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pinctrl_periphs: pinctrl@4b0 {
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compatible = "amlogic,meson-gxbb-periphs-pinctrl";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gpio: bank@4b0 {
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reg = <0x0 0x004b0 0x0 0x28>,
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<0x0 0x004e8 0x0 0x14>,
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<0x0 0x00120 0x0 0x14>,
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<0x0 0x00430 0x0 0x40>;
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reg-names = "mux", "pull", "pull-enable", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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};
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emmc_pins: emmc {
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mux {
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groups = "emmc_nand_d07",
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"emmc_cmd",
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"emmc_clk";
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function = "emmc";
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};
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};
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sdcard_pins: sdcard {
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mux {
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groups = "sdcard_d0",
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"sdcard_d1",
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"sdcard_d2",
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"sdcard_d3",
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"sdcard_cmd",
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"sdcard_clk";
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function = "sdcard";
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};
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};
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uart_a_pins: uart_a {
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mux {
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groups = "uart_tx_a",
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"uart_rx_a";
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function = "uart_a";
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};
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};
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uart_b_pins: uart_b {
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mux {
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groups = "uart_tx_b",
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"uart_rx_b";
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function = "uart_b";
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};
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};
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uart_c_pins: uart_c {
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mux {
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groups = "uart_tx_c",
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"uart_rx_c";
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function = "uart_c";
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};
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};
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eth_pins: eth_c {
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mux {
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groups = "eth_mdio",
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"eth_mdc",
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"eth_clk_rx_clk",
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"eth_rx_dv",
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"eth_rxd0",
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"eth_rxd1",
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"eth_rxd2",
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"eth_rxd3",
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"eth_rgmii_tx_clk",
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"eth_tx_en",
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"eth_txd0",
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"eth_txd1",
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"eth_txd2",
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"eth_txd3";
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function = "eth";
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};
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};
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};
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};
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hiubus: hiubus@c883c000 {
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compatible = "simple-bus";
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reg = <0x0 0xc883c000 0x0 0x2000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
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clkc: clock-controller@0 {
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compatible = "amlogic,gxbb-clkc";
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#clock-cells = <1>;
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reg = <0x0 0x0 0x0 0x3db>;
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};
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};
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apb: apb@d0000000 {
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compatible = "simple-bus";
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reg = <0x0 0xd0000000 0x0 0x200000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
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};
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ethmac: ethernet@c9410000 {
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compatible = "amlogic,meson6-dwmac", "snps,dwmac";
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reg = <0x0 0xc9410000 0x0 0x10000
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0x0 0xc8834540 0x0 0x4>;
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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clocks = <&xtal>;
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clock-names = "stmmaceth";
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phy-mode = "rgmii";
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status = "disabled";
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};
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};
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};
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