mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 14:10:43 +00:00
8976556a8a
LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc>
93 lines
2.3 KiB
Text
93 lines
2.3 KiB
Text
CONFIG_ARM=y
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CONFIG_TARGET_LS1043AQDS=y
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CONFIG_SYS_TEXT_BASE=0x40100000
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CONFIG_SYS_MALLOC_LEN=0x102000
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0x300000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_SYS_I2C_MXC_I2C4=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
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CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_VID=y
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CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv"
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CONFIG_VOL_MONITOR_INA220=y
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CONFIG_VOL_MONITOR_IR36021_SET=y
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CONFIG_FSL_QIXIS=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_ENV_ADDR=0x40300000
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CONFIG_AHCI=y
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CONFIG_SYS_MEMTEST_START=0x80000000
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CONFIG_SYS_MEMTEST_END=0x9fffffff
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_REMAKE_ELF=y
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CONFIG_MP=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_DYNAMIC_SYS_CLK_FREQ=y
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CONFIG_QSPI_BOOT=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
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# CONFIG_USE_BOOTCOMMAND is not set
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CONFIG_MISC_INIT_R=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GREPENV=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_CACHE=y
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CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_DM=y
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CONFIG_SATA=y
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CONFIG_SATA_CEVA=y
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CONFIG_FSL_CAAM=y
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_DYNAMIC_DDR_CLK_FREQ=y
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CONFIG_DDR_ECC=y
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CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
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CONFIG_MPC8XXX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_EARLY_INIT=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x57
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CONFIG_FSL_ESDHC=y
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# CONFIG_SPI_FLASH_BAR is not set
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CONFIG_SPI_FLASH_EON=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_PHYLIB=y
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CONFIG_PHYLIB_10G=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x40900000
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CONFIG_NVME_PCI=y
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CONFIG_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_LAYERSCAPE_RC=y
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CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
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CONFIG_DM_SCSI=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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