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f29f086a09
This 'commonizes' much of the clock/pll code. SoC-dependent code and tables are left in arch/cpu/tegraXXX-common/clock.c Some T30 tables needed whitespace fixes due to checkpatch complaints. Signed-off-by: Tom Warren <twarren@nvidia.com>
28 lines
928 B
C
28 lines
928 B
C
/*
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* Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _TEGRA30_H_
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#define _TEGRA30_H_
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#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */
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#include <asm/arch-tegra/tegra.h>
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#define BCT_ODMDATA_OFFSET 6116 /* 12 bytes from end of BCT */
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#define MAX_NUM_CPU 4
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#endif /* TEGRA30_H */
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