mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-23 19:43:33 +00:00
d3af06012a
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it. CONFIG_SYS_FSL_USDHC_NUM CONFIG_SYS_FSL_ESDHC_ADDR Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
113 lines
3.2 KiB
C
113 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2022 Toradex
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*/
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#ifndef __VERDIN_IMX8MP_H
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#define __VERDIN_IMX8MP_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#define CONFIG_SPL_MAX_SIZE (152 * 1024)
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#define CONFIG_SYS_MONITOR_LEN SZ_512K
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#define CONFIG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#ifdef CONFIG_SPL_BUILD
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/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
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#define CONFIG_SPL_STACK 0x960000
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#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
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#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K
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#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
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#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
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/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
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#define CONFIG_MALLOC_F_ADDR 0x184000
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/* For RAW image gives a error info not panic */
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#define CONFIG_POWER_PCA9450
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#define CONFIG_SYS_I2C
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#endif /* CONFIG_SPL_BUILD */
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/* ENET Config */
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/* ENET1 */
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_FEC_MXC_PHYADDR 7
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#define FEC_QUIRK_ENET_MAC
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#define PHY_ANEG_TIMEOUT 20000
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#endif /* CONFIG_CMD_NET */
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#define MEM_LAYOUT_ENV_SETTINGS \
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"fdt_addr_r=0x43000000\0" \
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"kernel_addr_r=0x40000000\0" \
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"ramdisk_addr_r=0x46400000\0" \
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"scriptaddr=0x46000000\0"
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/* Enable Distro Boot */
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#else
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#define BOOTENV
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#endif
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#if defined(CONFIG_TDX_EASY_INSTALLER)
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# define BOOT_SCRIPT "boot-tezi.scr"
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#else
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# define BOOT_SCRIPT "boot.scr"
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#endif
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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MEM_LAYOUT_ENV_SETTINGS \
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"bootcmd_mfg=fastboot 0\0" \
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"boot_file=Image\0" \
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"boot_scripts=" BOOT_SCRIPT "\0" \
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"boot_script_dhcp=" BOOT_SCRIPT "\0" \
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"console=ttymxc2\0" \
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"fdt_board=dev\0" \
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"initrd_addr=0x43800000\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
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"consoleblank=0 earlycon\0" \
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"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
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"if test \"$confirm\" = \"y\"; then " \
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"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
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"${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
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"${blkcnt}; fi\0"
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
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/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
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#define PHYS_SDRAM_2 0x100000000
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#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
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/* UART */
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#endif /* __VERDIN_IMX8MP_H */
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