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f29f086a09
This 'commonizes' much of the clock/pll code. SoC-dependent code and tables are left in arch/cpu/tegraXXX-common/clock.c Some T30 tables needed whitespace fixes due to checkpatch complaints. Signed-off-by: Tom Warren <twarren@nvidia.com>
38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _TEGRA20_H_
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#define _TEGRA20_H_
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#define NV_PA_SDRAM_BASE 0x00000000
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#include <asm/arch-tegra/tegra.h>
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#define TEGRA_USB1_BASE 0xC5000000
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#define TEGRA_USB3_BASE 0xC5008000
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#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
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#define MAX_NUM_CPU 2
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#endif /* TEGRA20_H */
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