u-boot/drivers/ddr
Marek Vasut 88c3bb49e1 ddr: socfpga: Clean up ddr_setup()
Replace the current rather convoluted code using ad-hoc polling
mechanism with a more straightforward code. Use wait_for_bit_le32()
to poll the DDRCALSTAT register instead of local reimplementation.
It makes no sense to pull for 5 seconds before giving up and trying
to restart the EMIF, so instead wait 500 mSec for the calibration to
complete and if this fails, restart the EMIF and try again. Perform
this 32 times instead of 3 times as the original code did.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-03-09 23:25:19 +01:00
..
altera ddr: socfpga: Clean up ddr_setup() 2019-03-09 23:25:19 +01:00
fsl configs: fsl: move DDR specific defines to Kconfig 2019-03-03 20:56:01 +05:30
imx drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00
marvell ARM: mvebu: restore license information in mv_ddr_plat.{c,h} 2018-12-09 17:10:13 -05:00
microchip SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00