mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 02:08:38 +00:00
84f841c5b9
Fix a small typo in some of the SoCFPGA dts files that has spread via copy-and-paste. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
103 lines
1.8 KiB
Text
103 lines
1.8 KiB
Text
/*
|
|
* Copyright (C) 2013 Altera Corporation <www.altera.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include "socfpga_arria5.dtsi"
|
|
|
|
/ {
|
|
model = "Altera SOCFPGA Arria V SoC Development Kit";
|
|
compatible = "altr,socfpga-arria5", "altr,socfpga";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
};
|
|
|
|
memory {
|
|
name = "memory";
|
|
device_type = "memory";
|
|
reg = <0x0 0x40000000>; /* 1GB */
|
|
};
|
|
|
|
aliases {
|
|
/* this allow the ethaddr uboot environment variable contents
|
|
* to be added to the gmac1 device tree blob.
|
|
*/
|
|
ethernet0 = &gmac1;
|
|
udc0 = &usb1;
|
|
};
|
|
|
|
regulator_3_3v: 3-3-v-regulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
soc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
};
|
|
|
|
&gmac1 {
|
|
status = "okay";
|
|
phy-mode = "rgmii";
|
|
|
|
rxd0-skew-ps = <0>;
|
|
rxd1-skew-ps = <0>;
|
|
rxd2-skew-ps = <0>;
|
|
rxd3-skew-ps = <0>;
|
|
txen-skew-ps = <0>;
|
|
txc-skew-ps = <2600>;
|
|
rxdv-skew-ps = <0>;
|
|
rxc-skew-ps = <2000>;
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
|
|
eeprom@51 {
|
|
compatible = "atmel,24c32";
|
|
reg = <0x51>;
|
|
pagesize = <32>;
|
|
};
|
|
|
|
rtc@68 {
|
|
compatible = "dallas,ds1339";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
&mmc0 {
|
|
vmmc-supply = <®ulator_3_3v>;
|
|
vqmmc-supply = <®ulator_3_3v>;
|
|
bus-width = <4>;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&usb1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&qspi {
|
|
status = "okay";
|
|
u-boot,dm-pre-reloc;
|
|
|
|
flash0: n25q00@0 {
|
|
u-boot,dm-pre-reloc;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "n25q00";
|
|
reg = <0>; /* chip select */
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
page-size = <256>;
|
|
block-size = <16>; /* 2^16, 64KB */
|
|
read-delay = <4>; /* delay value in read data capture register */
|
|
tshsl-ns = <50>;
|
|
tsd2d-ns = <50>;
|
|
tchsh-ns = <4>;
|
|
tslch-ns = <4>;
|
|
};
|
|
};
|