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Generic system controller (SC) covers connection defined by specification but different boards have different i2c devices. That's why describe i2c devices available on multiple boards. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ca1826b8b58981111229a94527818cc5a191ca9a.1695808407.git.michal.simek@amd.com
326 lines
7.9 KiB
Text
326 lines
7.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP VPK120 revB
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*
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* (C) Copyright 2021 - 2022, Xilinx, Inc.
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* (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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/dts-v1/;
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/plugin/;
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&{/} {
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compatible = "xlnx,zynqmp-sc-vpk120-revB", "xlnx,zynqmp-vpk120-revB",
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"xlnx,zynqmp-vpk120", "xlnx,zynqmp";
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};
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&i2c0 {
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#address-cells = <1>;
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#size-cells = <0>;
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tca6416_u233: gpio@20 { /* u233 */
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller; /* interrupt not connected */
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#gpio-cells = <2>;
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gpio-line-names = "", "", "QSFPDD1_MODSELL", "QSFPDD2_MODSELL", /* 0 - 3 */
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"PMBUS2_INA226_ALERT", "", "", "", /* 4 - 7 */
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"FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */
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"VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */
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};
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i2c-mux@74 { /* u33 */
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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/* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
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pmbus_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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/* On connector J325 */
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ir38060_41: regulator@41 { /* IR38060 - u259 */
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compatible = "infineon,ir38060", "infineon,ir38064";
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reg = <0x41>; /* i2c addr 0x11 */
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};
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ir38164_43: regulator@43 { /* IR38164 - u13 */
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compatible = "infineon,ir38164";
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reg = <0x43>; /* i2c addr 0x13 */
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};
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ir35221_46: pmic@46 { /* IR35221 - u152 */
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compatible = "infineon,ir35221";
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reg = <0x46>; /* i2c addr - 0x16 */
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};
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irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */
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compatible = "infineon,irps5401";
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reg = <0x47>; /* i2c addr 0x17 */
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};
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ir38164_49: regulator@49 { /* IR38164 - u189 */
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compatible = "infineon,ir38164";
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reg = <0x49>; /* i2c addr 0x19 */
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};
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irps5401_4c: pmic@4c { /* IRPS5401 - u167 */
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compatible = "infineon,irps5401";
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reg = <0x4c>; /* i2c addr 0x1c */
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};
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irps5401_4d: pmic@4d { /* IRPS5401 - u175 */
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compatible = "infineon,irps5401";
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reg = <0x4d>; /* i2c addr 0x1d */
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};
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ir38164_4e: regulator@4e { /* IR38164 - u185 */
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compatible = "infineon,ir38164";
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reg = <0x4e>; /* i2c addr 0x1e */
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};
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ir38164_4f: regulator@4f { /* IR38164 - u187 */
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compatible = "infineon,ir38164";
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reg = <0x4f>; /* i2c addr 0x1f */
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};
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};
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pmbus1_ina226_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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/* FIXME check alerts coming to SC */
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vccint: ina226@40 { /* u65 */
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compatible = "ti,ina226";
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reg = <0x40>;
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shunt-resistor = <5000>;
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};
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vcc_soc: ina226@41 { /* u161 */
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compatible = "ti,ina226";
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reg = <0x41>;
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shunt-resistor = <5000>;
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};
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vcc_pmc: ina226@42 { /* u163 */
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compatible = "ti,ina226";
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reg = <0x42>;
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shunt-resistor = <5000>;
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};
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vcc_ram: ina226@43 { /* u5 */
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compatible = "ti,ina226";
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reg = <0x43>;
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shunt-resistor = <5000>;
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};
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vcc_pslp: ina226@44 { /* u165 */
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compatible = "ti,ina226";
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reg = <0x44>;
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shunt-resistor = <5000>;
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};
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vcc_psfp: ina226@45 { /* u164 */
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compatible = "ti,ina226";
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reg = <0x45>;
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shunt-resistor = <5000>;
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};
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};
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i2c@2 { /* NC */ /* FIXME maybe remove */
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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};
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pmbus2_ina226_i2c: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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/* FIXME check alerts coming to SC */
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vccaux: ina226@40 { /* u166 */
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compatible = "ti,ina226";
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reg = <0x40>;
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shunt-resistor = <5000>;
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};
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vccaux_pmc: ina226@41 { /* u168 */
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compatible = "ti,ina226";
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reg = <0x41>;
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shunt-resistor = <5000>;
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};
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mgtavcc: ina226@42 { /* u265 */
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compatible = "ti,ina226";
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reg = <0x42>;
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shunt-resistor = <5000>;
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};
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vcc1v5: ina226@43 { /* u264 */
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compatible = "ti,ina226";
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reg = <0x43>;
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shunt-resistor = <5000>;
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};
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vcco_mio: ina226@45 { /* u172 */
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compatible = "ti,ina226";
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reg = <0x45>;
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shunt-resistor = <5000>;
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};
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mgtavtt: ina226@46 { /* u188 */
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compatible = "ti,ina226";
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reg = <0x46>;
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shunt-resistor = <2000>;
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};
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vcco_502: ina226@47 { /* u174 */
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compatible = "ti,ina226";
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reg = <0x47>;
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shunt-resistor = <5000>;
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};
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mgtvccaux: ina226@48 { /* u176 */
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compatible = "ti,ina226";
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reg = <0x48>;
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shunt-resistor = <5000>;
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};
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vcc1v1_lp4: ina226@49 { /* u186 */
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compatible = "ti,ina226";
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reg = <0x49>;
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shunt-resistor = <2000>;
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};
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vadj_fmc: ina226@4a { /* u184 */
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compatible = "ti,ina226";
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reg = <0x4a>;
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shunt-resistor = <2000>;
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};
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lpdmgtyavcc: ina226@4b { /* u177 */
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compatible = "ti,ina226";
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reg = <0x4b>;
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shunt-resistor = <5000>;
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};
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lpdmgtyavtt: ina226@4c { /* u260 */
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compatible = "ti,ina226";
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reg = <0x4c>;
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shunt-resistor = <2000>;
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};
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lpdmgtyvccaux: ina226@4d { /* u234 */
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compatible = "ti,ina226";
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reg = <0x4d>;
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shunt-resistor = <5000>;
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};
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};
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i2c@4 { /* NC */
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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};
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i2c@5 { /* NC */
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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};
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user_si570: i2c@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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user_si570_1: clock-generator@5f { /* USER C0 SI570 - u205 */
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#clock-cells = <0>;
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compatible = "silabs,si570";
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reg = <0x5f>;
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temperature-stability = <50>;
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factory-fout = <100000000>;
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clock-frequency = <100000000>;
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clock-output-names = "fmc_si570";
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silabs,skip-recall;
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};
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};
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/* 7 unused */
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};
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};
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&i2c1 {
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-mux@74 { /* u35 */
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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/* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
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ref_clk_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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ref_clk: clock-generator@5d { /* u32 */
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#clock-cells = <0>;
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compatible = "silabs,si570";
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reg = <0x5d>;
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temperature-stability = <50>;
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factory-fout = <33333333>;
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clock-frequency = <33333333>;
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clock-output-names = "ref_clk";
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silabs,skip-recall;
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};
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};
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fmcp1_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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/* FIXME connection to Samtec J51C */
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/* expected eeprom 0x50 SE cards */
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};
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i2c@2 { /* NC - FIXME */
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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};
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lpddr4_si570_clk3_i2c: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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lpddr4_clk3: clock-generator@60 { /* u4 */
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#clock-cells = <0>;
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compatible = "silabs,si570";
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reg = <0x60>;
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temperature-stability = <50>;
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factory-fout = <200000000>;
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clock-frequency = <200000000>;
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clock-output-names = "lpddr4_clk3";
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silabs,skip-recall;
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};
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};
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lpddr4_si570_clk2_i2c: i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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lpddr4_clk2: clock-generator@60 { /* u3 */
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#clock-cells = <0>;
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compatible = "silabs,si570";
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reg = <0x60>;
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temperature-stability = <50>;
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factory-fout = <200000000>;
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clock-frequency = <200000000>;
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clock-output-names = "lpddr4_clk2";
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silabs,skip-recall;
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};
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};
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lpddr4_si570_clk1_i2c: i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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lpddr4_clk1: clock-generator@60 { /* u248 */
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#clock-cells = <0>;
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compatible = "silabs,si570";
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reg = <0x60>;
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temperature-stability = <50>;
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factory-fout = <200000000>;
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clock-frequency = <200000000>;
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clock-output-names = "lpddr4_clk1";
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silabs,skip-recall;
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};
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};
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qsfpdd_i2c: i2c@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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/* J1/J2 connectors */
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};
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idt8a34001_i2c: i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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/* Via J310 connector */
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idt_8a34001: phc@5b {
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compatible = "idt,8a34001"; /* u219B */
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reg = <0x5b>; /* FIXME not in schematics */
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};
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};
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};
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};
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