u-boot/arch/arm/dts/rz-smarc-common.dtsi
Paul Barker e3e01a6f94 arm: dts: Import RZ/G2L SMARC EVK device tree
The Renesas RZ/G2L SMARC Evaluation Board Kit consists of the RZ/G2L
System-on-Module (SOM) based on the R9A07G044L2 SoC, and a common SMARC
carrier board.

This patch is based on the corresponding Linux v6.5 device tree
(commit 52e12027d50affbf60c6c9c64db8017391b0c22e).

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-17 03:27:42 +02:00

183 lines
3.1 KiB
Text

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
*
* Copyright (C) 2022 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
/*
* SSI-WM8978
*
* This command is required when Playback/Capture
*
* amixer cset name='Left Input Mixer L2 Switch' on
* amixer cset name='Right Input Mixer R2 Switch' on
* amixer cset name='Headphone Playback Volume' 100
* amixer cset name='PCM Volume' 100%
* amixer cset name='Input PGA Volume' 25
*
*/
/ {
aliases {
serial0 = &scif0;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
chosen {
stdout-path = "serial0:115200n8";
};
audio_mclock: audio_mclock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
};
snd_rzg2l: sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&cpu_dai>;
simple-audio-card,frame-master = <&cpu_dai>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets = "Microphone", "Microphone Jack";
simple-audio-card,routing =
"L2", "Mic Bias",
"R2", "Mic Bias",
"Mic Bias", "Microphone Jack";
cpu_dai: simple-audio-card,cpu {
};
codec_dai: simple-audio-card,codec {
clocks = <&audio_mclock>;
sound-dai = <&wm8978>;
};
};
usb0_vbus_otg: regulator-usb0-vbus-otg {
compatible = "regulator-fixed";
regulator-name = "USB0_VBUS_OTG";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vccq_sdhi1: regulator-vccq-sdhi1 {
compatible = "regulator-gpio";
regulator-name = "SDHI1 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
};
&audio_clk1{
clock-frequency = <11289600>;
};
&audio_clk2{
clock-frequency = <12288000>;
};
&canfd {
pinctrl-0 = <&can0_pins &can1_pins>;
pinctrl-names = "default";
status = "okay";
channel0 {
status = "okay";
};
channel1 {
status = "okay";
};
};
&ehci0 {
dr_mode = "otg";
status = "okay";
};
&ehci1 {
status = "okay";
};
&hsusb {
dr_mode = "otg";
status = "okay";
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
};
&ohci0 {
dr_mode = "otg";
status = "okay";
};
&ohci1 {
status = "okay";
};
&phyrst {
status = "okay";
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
pinctrl-1 = <&sdhi1_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&vccq_sdhi1>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
vbus-supply = <&usb0_vbus_otg>;
status = "okay";
};
&usb2_phy1 {
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
status = "okay";
};