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d1998a9fde
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
585 lines
14 KiB
C
585 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 MediaTek Inc. All Rights Reserved.
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*
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* Author: Weijie Gao <weijie.gao@mediatek.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include "pinctrl-mtmips-common.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define AGPIO_OFS 0
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#define GPIOMODE1_OFS 0x24
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#define GPIOMODE2_OFS 0x28
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#define EPHY4_1_PAD_SHIFT 17
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#define EPHY4_1_PAD_MASK 0x0f
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#define EPHY0_SHIFT 16
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#define RF_OLT_MODE_SHIFT 12
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#define N9_EINT_SRC_SHIFT 9
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#define WLED_OD_SHIFT 8
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#define REF_CLKO_PAD_SHIFT 4
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#define I2S_CLK_PAD_SHIFT 3
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#define I2S_WS_PAD_SHIFT 2
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#define I2S_SDO_PAD_SHIFT 1
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#define I2S_SDI_PAD_SHIFT 0
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#define GM4_MASK 3
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#define P4LED_K_SHIFT 26
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#define P3LED_K_SHIFT 24
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#define P2LED_K_SHIFT 22
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#define P1LED_K_SHIFT 20
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#define P0LED_K_SHIFT 18
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#define WLED_K_SHIFT 16
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#define P4LED_A_SHIFT 10
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#define P3LED_A_SHIFT 8
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#define P2LED_A_SHIFT 6
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#define P1LED_A_SHIFT 4
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#define P0LED_A_SHIFT 2
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#define WLED_A_SHIFT 0
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#define PWM1_SHIFT 30
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#define PWM0_SHIFT 28
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#define UART2_SHIFT 26
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#define UART1_SHIFT 24
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#define I2C_SHIFT 20
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#define REFCLK_SHIFT 18
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#define PERST_SHIFT 16
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#define ESD_SHIFT 15
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#define WDT_SHIFT 14
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#define SPI_SHIFT 12
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#define SDMODE_SHIFT 10
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#define UART0_SHIFT 8
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#define I2S_SHIFT 6
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#define SPI_CS1_SHIFT 4
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#define SPIS_SHIFT 2
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#define GPIO0_SHIFT 0
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#define PAD_PU_G0_REG 0x00
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#define PAD_PU_G1_REG 0x04
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#define PAD_PD_G0_REG 0x10
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#define PAD_PD_G1_REG 0x14
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#define PAD_SR_G0_REG 0x20
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#define PAD_SR_G1_REG 0x24
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#define PAD_SMT_G0_REG 0x30
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#define PAD_SMT_G1_REG 0x34
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#define PAD_E2_G0_REG 0x40
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#define PAD_E2_G1_REG 0x44
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#define PAD_E4_G0_REG 0x50
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#define PAD_E4_G1_REG 0x54
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#define PAD_E8_G0_REG 0x60
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#define PAD_E8_G1_REG 0x64
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#define PIN_CONFIG_DRIVE_STRENGTH_28 (PIN_CONFIG_END + 1)
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#define PIN_CONFIG_DRIVE_STRENGTH_4G (PIN_CONFIG_END + 2)
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struct mt7628_pinctrl_priv {
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struct mtmips_pinctrl_priv mp;
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void __iomem *pcbase;
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};
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#if CONFIG_IS_ENABLED(PINMUX)
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static const struct mtmips_pmx_func ephy4_1_pad_grp[] = {
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FUNC("digital", 0xf),
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FUNC("analog", 0),
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};
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static const struct mtmips_pmx_func ephy0_grp[] = {
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FUNC("disable", 1),
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FUNC("enable", 0),
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};
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static const struct mtmips_pmx_func rf_olt_grp[] = {
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FUNC("enable", 1),
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FUNC("disable", 0),
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};
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static const struct mtmips_pmx_func n9_eint_src_grp[] = {
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FUNC("gpio", 1),
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FUNC("utif", 0),
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};
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static const struct mtmips_pmx_func wlen_od_grp[] = {
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FUNC("enable", 1),
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FUNC("disable", 0),
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};
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static const struct mtmips_pmx_func ref_clko_grp[] = {
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FUNC("digital", 1),
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FUNC("analog", 0),
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};
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static const struct mtmips_pmx_func i2s_clk_grp[] = {
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FUNC("digital", 1),
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FUNC("analog", 0),
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};
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static const struct mtmips_pmx_func i2s_ws_grp[] = {
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FUNC("digital", 1),
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FUNC("analog", 0),
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};
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static const struct mtmips_pmx_func i2s_sdo_grp[] = {
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FUNC("digital", 1),
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FUNC("analog", 0),
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};
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static const struct mtmips_pmx_func i2s_sdi_grp[] = {
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FUNC("digital", 1),
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FUNC("analog", 0),
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};
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static const struct mtmips_pmx_func pwm1_grp[] = {
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FUNC("sdxc d6", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("pwm1", 0),
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};
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static const struct mtmips_pmx_func pwm0_grp[] = {
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FUNC("sdxc d7", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("pwm0", 0),
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};
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static const struct mtmips_pmx_func uart2_grp[] = {
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FUNC("sdxc d5 d4", 3),
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FUNC("pwm", 2),
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FUNC("gpio", 1),
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FUNC("uart2", 0),
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};
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static const struct mtmips_pmx_func uart1_grp[] = {
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FUNC("sw_r", 3),
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FUNC("pwm", 2),
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FUNC("gpio", 1),
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FUNC("uart1", 0),
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};
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static const struct mtmips_pmx_func i2c_grp[] = {
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FUNC("-", 3),
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FUNC("debug", 2),
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FUNC("gpio", 1),
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FUNC("i2c", 0),
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};
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static const struct mtmips_pmx_func refclk_grp[] = {
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FUNC("gpio", 1),
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FUNC("refclk", 0),
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};
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static const struct mtmips_pmx_func perst_grp[] = {
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FUNC("gpio", 1),
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FUNC("perst", 0),
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};
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static const struct mtmips_pmx_func esd_grp[] = {
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FUNC("router", 1),
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FUNC("iot", 0),
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};
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static const struct mtmips_pmx_func wdt_grp[] = {
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FUNC("gpio", 1),
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FUNC("wdt", 0),
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};
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static const struct mtmips_pmx_func spi_grp[] = {
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FUNC("gpio", 1),
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FUNC("spi", 0),
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};
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static const struct mtmips_pmx_func sd_mode_grp[] = {
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FUNC("n9 jtag", 3),
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FUNC("utif1", 2),
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FUNC("gpio", 1),
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FUNC("sdxc", 0),
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};
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static const struct mtmips_pmx_func uart0_grp[] = {
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FUNC("-", 3),
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FUNC("-", 2),
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FUNC("gpio", 1),
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FUNC("uart0", 0),
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};
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static const struct mtmips_pmx_func i2s_grp[] = {
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FUNC("antenna", 3),
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FUNC("pcm", 2),
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FUNC("gpio", 1),
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FUNC("i2s", 0),
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};
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static const struct mtmips_pmx_func spi_cs1_grp[] = {
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FUNC("-", 3),
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FUNC("refclk", 2),
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FUNC("gpio", 1),
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FUNC("spi cs1", 0),
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};
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static const struct mtmips_pmx_func spis_grp[] = {
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FUNC("pwm_uart2", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("spis", 0),
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};
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static const struct mtmips_pmx_func gpio0_grp[] = {
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FUNC("perst", 3),
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FUNC("refclk", 2),
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FUNC("gpio", 1),
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FUNC("gpio0", 0),
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};
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static const struct mtmips_pmx_func wled_a_grp[] = {
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FUNC("-", 3),
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FUNC("-", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p0led_a_grp[] = {
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FUNC("jtag", 3),
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FUNC("rsvd", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p1led_a_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p2led_a_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p3led_a_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p4led_a_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func wled_k_grp[] = {
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FUNC("-", 3),
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FUNC("-", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p0led_k_grp[] = {
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FUNC("jtag", 3),
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FUNC("rsvd", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p1led_k_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p2led_k_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p3led_k_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_func p4led_k_grp[] = {
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FUNC("jtag", 3),
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FUNC("utif", 2),
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FUNC("gpio", 1),
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FUNC("led", 0),
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};
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static const struct mtmips_pmx_group mt7628_pinmux_data[] = {
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GRP("ephy4_1_pad", ephy4_1_pad_grp, AGPIO_OFS, EPHY4_1_PAD_SHIFT,
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EPHY4_1_PAD_MASK),
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GRP("ephy0", ephy0_grp, AGPIO_OFS, EPHY0_SHIFT, 1),
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GRP("rf_olt", rf_olt_grp, AGPIO_OFS, RF_OLT_MODE_SHIFT, 1),
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GRP("n9_eint_src", n9_eint_src_grp, AGPIO_OFS, N9_EINT_SRC_SHIFT, 1),
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GRP("wlen_od", wlen_od_grp, AGPIO_OFS, WLED_OD_SHIFT, 1),
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GRP("ref_clko_pad", ref_clko_grp, AGPIO_OFS, REF_CLKO_PAD_SHIFT, 1),
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GRP("i2s_clk_pad", i2s_clk_grp, AGPIO_OFS, I2S_CLK_PAD_SHIFT, 1),
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GRP("i2s_ws_pad", i2s_ws_grp, AGPIO_OFS, I2S_WS_PAD_SHIFT, 1),
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GRP("i2s_sdo_pad", i2s_sdo_grp, AGPIO_OFS, I2S_SDO_PAD_SHIFT, 1),
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GRP("i2s_sdi_pad", i2s_sdi_grp, AGPIO_OFS, I2S_SDI_PAD_SHIFT, 1),
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GRP("pwm1", pwm1_grp, GPIOMODE1_OFS, PWM1_SHIFT, GM4_MASK),
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GRP("pwm0", pwm0_grp, GPIOMODE1_OFS, PWM0_SHIFT, GM4_MASK),
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GRP("uart2", uart2_grp, GPIOMODE1_OFS, UART2_SHIFT, GM4_MASK),
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GRP("uart1", uart1_grp, GPIOMODE1_OFS, UART1_SHIFT, GM4_MASK),
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GRP("i2c", i2c_grp, GPIOMODE1_OFS, I2C_SHIFT, GM4_MASK),
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GRP("refclk", refclk_grp, GPIOMODE1_OFS, REFCLK_SHIFT, 1),
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GRP("perst", perst_grp, GPIOMODE1_OFS, PERST_SHIFT, 1),
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GRP("sd router", esd_grp, GPIOMODE1_OFS, ESD_SHIFT, 1),
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GRP("wdt", wdt_grp, GPIOMODE1_OFS, WDT_SHIFT, 1),
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GRP("spi", spi_grp, GPIOMODE1_OFS, SPI_SHIFT, 1),
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GRP("sdmode", sd_mode_grp, GPIOMODE1_OFS, SDMODE_SHIFT, GM4_MASK),
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GRP("uart0", uart0_grp, GPIOMODE1_OFS, UART0_SHIFT, GM4_MASK),
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GRP("i2s", i2s_grp, GPIOMODE1_OFS, I2S_SHIFT, GM4_MASK),
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GRP("spi cs1", spi_cs1_grp, GPIOMODE1_OFS, SPI_CS1_SHIFT, GM4_MASK),
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GRP("spis", spis_grp, GPIOMODE1_OFS, SPIS_SHIFT, GM4_MASK),
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GRP("gpio0", gpio0_grp, GPIOMODE1_OFS, GPIO0_SHIFT, GM4_MASK),
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GRP("wled_a", wled_a_grp, GPIOMODE2_OFS, WLED_A_SHIFT, GM4_MASK),
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GRP("p0led_a", p0led_a_grp, GPIOMODE2_OFS, P0LED_A_SHIFT, GM4_MASK),
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GRP("p1led_a", p1led_a_grp, GPIOMODE2_OFS, P1LED_A_SHIFT, GM4_MASK),
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GRP("p2led_a", p2led_a_grp, GPIOMODE2_OFS, P2LED_A_SHIFT, GM4_MASK),
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GRP("p3led_a", p3led_a_grp, GPIOMODE2_OFS, P3LED_A_SHIFT, GM4_MASK),
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GRP("p4led_a", p4led_a_grp, GPIOMODE2_OFS, P4LED_A_SHIFT, GM4_MASK),
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GRP("wled_k", wled_k_grp, GPIOMODE2_OFS, WLED_K_SHIFT, GM4_MASK),
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GRP("p0led_k", p0led_k_grp, GPIOMODE2_OFS, P0LED_K_SHIFT, GM4_MASK),
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GRP("p1led_k", p1led_k_grp, GPIOMODE2_OFS, P1LED_K_SHIFT, GM4_MASK),
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GRP("p2led_k", p2led_k_grp, GPIOMODE2_OFS, P2LED_K_SHIFT, GM4_MASK),
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GRP("p3led_k", p3led_k_grp, GPIOMODE2_OFS, P3LED_K_SHIFT, GM4_MASK),
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GRP("p4led_k", p4led_k_grp, GPIOMODE2_OFS, P4LED_K_SHIFT, GM4_MASK),
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};
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static int mt7628_get_groups_count(struct udevice *dev)
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{
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return ARRAY_SIZE(mt7628_pinmux_data);
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}
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static const char *mt7628_get_group_name(struct udevice *dev,
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unsigned int selector)
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{
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return mt7628_pinmux_data[selector].name;
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}
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#endif /* CONFIG_IS_ENABLED(PINMUX) */
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#if CONFIG_IS_ENABLED(PINCONF)
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static const struct pinconf_param mt7628_conf_params[] = {
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{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
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{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
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{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
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{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
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{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
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{ "drive-strength-28", PIN_CONFIG_DRIVE_STRENGTH_28, 0 },
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{ "drive-strength-4g", PIN_CONFIG_DRIVE_STRENGTH_4G, 0 },
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{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
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};
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static const char *const mt7628_pins[] = {
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"i2s_sdi",
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"i2s_sdo",
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"i2s_ws",
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"i2s_clk",
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"i2s_sclk",
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"i2c_sd",
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"spi_cs1",
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"spi_clk",
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"spi_mosi",
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"spi_miso",
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"spi_cs0",
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"gpio0",
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"uart0_txd",
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"uart0_rxd",
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"spis_cs",
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"spis_clk",
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"spis_miso",
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"spis_mosi",
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"pwm_ch0",
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"pwm_ch1",
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"uart2_txd",
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"uart2_rxd",
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"sd_wp",
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"sd_cd",
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"sd_d1",
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"sd_d0",
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"sd_clk",
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"sd_cmd",
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"sd_d3",
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"sd_d2",
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"ephy_led4_k",
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"ephy_led3_k",
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"ephy_led2_k",
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"ephy_led1_k",
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"ephy_led0_k",
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"wled_k",
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"perst_n",
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"co_clko",
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"wdt",
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"ephy_led4_a",
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"ephy_led3_a",
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"ephy_led2_a",
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"ephy_led1_a",
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"ephy_led0_a",
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"wled_a",
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"uart1_txd",
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"uart1_rxd",
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};
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static const u32 mt7628_drv_strength_28_tbl[] = {2, 4, 6, 8};
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static const u32 mt7628_drv_strength_4g_tbl[] = {4, 8, 12, 16};
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static int mt7628_set_drv_strength(void __iomem *base, u32 val, u32 bit,
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const u32 tbl[], u32 reg_lo, u32 reg_hi)
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{
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int i;
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for (i = 0; i < 4; i++)
|
|
if (tbl[i] == val)
|
|
break;
|
|
|
|
if (i >= 4)
|
|
return -EINVAL;
|
|
|
|
clrsetbits_32(base + reg_lo, BIT(bit), (i & 1) << bit);
|
|
clrsetbits_32(base + reg_hi, BIT(bit), ((i >> 1) & 1) << bit);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mt7628_get_pins_count(struct udevice *dev)
|
|
{
|
|
return ARRAY_SIZE(mt7628_pins);
|
|
}
|
|
|
|
static const char *mt7628_get_pin_name(struct udevice *dev,
|
|
unsigned int selector)
|
|
{
|
|
return mt7628_pins[selector];
|
|
}
|
|
|
|
static int mt7628_pinconf_set(struct udevice *dev, unsigned int pin_selector,
|
|
unsigned int param, unsigned int argument)
|
|
{
|
|
struct mt7628_pinctrl_priv *priv = dev_get_priv(dev);
|
|
u32 offs, bit;
|
|
int ret = 0;
|
|
|
|
offs = (pin_selector / 32) * 4;
|
|
bit = pin_selector % 32;
|
|
|
|
switch (param) {
|
|
case PIN_CONFIG_BIAS_DISABLE:
|
|
clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit));
|
|
clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit));
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit));
|
|
clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit));
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit));
|
|
setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit));
|
|
break;
|
|
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
|
|
clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG,
|
|
BIT(bit), (!!argument) << bit);
|
|
break;
|
|
case PIN_CONFIG_DRIVE_STRENGTH_28:
|
|
ret = mt7628_set_drv_strength(priv->pcbase + offs, argument,
|
|
bit, mt7628_drv_strength_28_tbl,
|
|
PAD_E2_G0_REG, PAD_E4_G0_REG);
|
|
break;
|
|
case PIN_CONFIG_DRIVE_STRENGTH_4G:
|
|
ret = mt7628_set_drv_strength(priv->pcbase + offs, argument,
|
|
bit, mt7628_drv_strength_4g_tbl,
|
|
PAD_E4_G0_REG, PAD_E8_G0_REG);
|
|
break;
|
|
case PIN_CONFIG_SLEW_RATE:
|
|
clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG,
|
|
BIT(bit), (!!argument) << bit);
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
static int mt7628_pinctrl_probe(struct udevice *dev)
|
|
{
|
|
struct mt7628_pinctrl_priv *priv = dev_get_priv(dev);
|
|
int ret = 0;
|
|
|
|
#if CONFIG_IS_ENABLED(PINMUX)
|
|
ret = mtmips_pinctrl_probe(&priv->mp, ARRAY_SIZE(mt7628_pinmux_data),
|
|
mt7628_pinmux_data);
|
|
#endif /* CONFIG_IS_ENABLED(PINMUX) */
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mt7628_pinctrl_of_to_plat(struct udevice *dev)
|
|
{
|
|
struct mt7628_pinctrl_priv *priv = dev_get_priv(dev);
|
|
|
|
priv->mp.base = (void __iomem *)dev_remap_addr_index(dev, 0);
|
|
|
|
if (!priv->mp.base)
|
|
return -EINVAL;
|
|
|
|
priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1);
|
|
|
|
if (!priv->pcbase)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct pinctrl_ops mt7628_pinctrl_ops = {
|
|
#if CONFIG_IS_ENABLED(PINMUX)
|
|
.get_groups_count = mt7628_get_groups_count,
|
|
.get_group_name = mt7628_get_group_name,
|
|
.get_functions_count = mtmips_get_functions_count,
|
|
.get_function_name = mtmips_get_function_name,
|
|
.pinmux_group_set = mtmips_pinmux_group_set,
|
|
#endif /* CONFIG_IS_ENABLED(PINMUX) */
|
|
#if CONFIG_IS_ENABLED(PINCONF)
|
|
.pinconf_num_params = ARRAY_SIZE(mt7628_conf_params),
|
|
.pinconf_params = mt7628_conf_params,
|
|
.get_pins_count = mt7628_get_pins_count,
|
|
.get_pin_name = mt7628_get_pin_name,
|
|
.pinconf_set = mt7628_pinconf_set,
|
|
#endif /* CONFIG_IS_ENABLED(PINCONF) */
|
|
.set_state = pinctrl_generic_set_state,
|
|
};
|
|
|
|
static const struct udevice_id mt7628_pinctrl_ids[] = {
|
|
{ .compatible = "mediatek,mt7628-pinctrl" },
|
|
{ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(mt7628_pinctrl) = {
|
|
.name = "mt7628-pinctrl",
|
|
.id = UCLASS_PINCTRL,
|
|
.of_match = mt7628_pinctrl_ids,
|
|
.of_to_plat = mt7628_pinctrl_of_to_plat,
|
|
.ops = &mt7628_pinctrl_ops,
|
|
.probe = mt7628_pinctrl_probe,
|
|
.priv_auto = sizeof(struct mt7628_pinctrl_priv),
|
|
};
|