Tom Rini 6e7df1d151 global: Finish CONFIG -> CFG migration ... At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>		2023-01-20 12:27:24 -05:00
..
arch-fu540	board: sifive: use ccache driver instead of helper function	2021-09-07 10:34:29 +08:00
arch-fu740	board: sifive: use ccache driver instead of helper function	2021-09-07 10:34:29 +08:00
arch-generic	dm: treewide: Rename ..._platdata variables to just ..._plat	2020-12-13 16:51:09 -07:00
asm.h	riscv: Sync csr.h with Linux kernel v5.2	2019-08-15 13:42:28 +08:00
barrier.h	riscv: make use of the barrier functions from Linux	2018-11-26 13:57:30 +08:00
bitops.h	riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()	2018-05-15 21:44:05 -04:00
byteorder.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
cache.h	riscv: lib: modify the indent	2021-09-07 10:34:29 +08:00
config.h	Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig	2022-07-07 14:01:09 -04:00
csr.h	riscv: Add option to support RISC-V privileged spec 1.9	2020-07-01 15:01:22 +08:00
dma-mapping.h	dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>	2020-02-19 21:27:30 +08:00
encoding.h	global: Finish CONFIG -> CFG migration	2023-01-20 12:27:24 -05:00
global_data.h	riscv: Rename Andes PLIC to PLICSW	2022-11-03 13:27:56 +08:00
gpio.h	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
io.h	riscv: Clean up asm/io.h	2022-05-26 18:41:21 +08:00
linkage.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
posix_types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
processor.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
ptrace.h	riscv: checkpatch: Fix alignment should match open parenthesis	2018-03-30 13:13:22 +08:00
sbi.h	riscv: provide missing base extension functions	2022-04-06 09:40:05 +08:00
sections.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
setjmp.h	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
smp.h	doc: replace @return by Return:	2022-01-19 18:11:34 +01:00
spl.h	arch/riscv: add semihosting support for RISC-V	2022-12-08 15:15:58 +08:00
string.h	riscv: assembler versions of memcpy, memmove, memset	2021-04-08 15:37:29 +08:00
syscon.h	riscv: Rename Andes PLIC to PLICSW	2022-11-03 13:27:56 +08:00
system.h	event: Convert arch_cpu_init_dm() to use events	2022-03-10 08:28:36 -05:00
types.h	riscv: Change phys_addr_t and phys_size_t to 64-bit	2021-02-03 03:38:41 -07:00
u-boot-riscv.h	riscv: Provide a mechanism to fix DT for reserved memory	2020-04-23 10:14:16 +08:00
u-boot.h	bdinfo: riscv: Use generic bd_info	2020-06-25 13:24:10 -04:00
unaligned.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00