mirror of
https://github.com/AsahiLinux/u-boot
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dcd18eaf61
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
86 lines
3 KiB
C
86 lines
3 KiB
C
/*
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* Configuation settings for the ESPT-GIGA board
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*
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* Copyright (C) 2008 Renesas Solutions Corp.
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* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ESPT_H
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#define __ESPT_H
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#define CONFIG_CPU_SH7763 1
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#define __LITTLE_ENDIAN 1
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_DISPLAY_BOARDINFO
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#undef CONFIG_SHOW_BOOT_PROGRESS
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/* SCIF */
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#define CONFIG_CONS_SCIF0 1
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#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
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settings for this board */
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
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#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
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/* Flash(NOR) S29JL064H */
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#define CONFIG_SYS_FLASH_BASE (0xA0000000)
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#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
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#define CONFIG_SYS_MAX_FLASH_BANKS (1)
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#define CONFIG_SYS_MAX_FLASH_SECT (150)
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/* U-Boot setting */
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
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#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
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/* Size of DRAM reserved for malloc() use */
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#undef CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
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/* Timeout for Flash erase operations (in ms) */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
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/* Timeout for Flash write operations (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
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/* Timeout for Flash set sector lock bit operations (in ms) */
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#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
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/* Timeout for Flash clear lock bit operations (in ms) */
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
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/* Use hardware flash sectors protection instead of U-Boot software protection */
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#undef CONFIG_SYS_FLASH_PROTECTION
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#undef CONFIG_SYS_DIRECT_FLASH_TFTP
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
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/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
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/* Clock */
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#define CONFIG_SYS_CLK_FREQ 66666666
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SYS_TMU_CLK_DIV 4
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/* Ether */
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#define CONFIG_SH_ETHER_USE_PORT (1)
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#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
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#endif /* __SH7763RDP_H */
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