u-boot/arch/arm/include/asm/arch-mx5
Stefano Babic c4559daa91 MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the
values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH
are now clearly wrong:

"Bit 13:
High / Low Output Voltage Range. This bit selects the output voltage mode for
SD2_CMD. 0 High output voltage mode
1 Low output voltage mode"

The values are currently negated in code - fixed.

Reported-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: David Jander <david.jander@protonic.nl>
Acked-by: David Jander <david.jander@protonic.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-15 08:31:35 +02:00
..
clock.h mx5: Add clock config interface 2012-05-15 08:31:32 +02:00
crm_regs.h mx5: Add clock config interface 2012-05-15 08:31:32 +02:00
gpio.h MX5: make use of GPIO framework for MX5 processor 2011-09-04 11:36:11 +02:00
imx-regs.h mx53loco: Add CONFIG_REVISION_TAG 2012-05-15 08:31:34 +02:00
iomux.h MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged 2012-05-15 08:31:35 +02:00
mx5x_pins.h imx: Remove unneeded/repititive definitions from imx headers 2012-04-16 14:53:59 +02:00
sys_proto.h mx53loco: Allow to print CPU information at a later stage 2012-05-15 08:31:32 +02:00