mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
68cebb8027
Current timer routines (arch/mips/lib/timer.c) are implemented assuming that MIPS32 coprocessor (CP0) resources, Counter and Compare registers in this case, are available. But this doesn't always work. We need to make sure that all MIPS-based systems don't necessarily use CP0 counter/compare registers as time keeping resources. And some MIPS variant processors might come with different hardware specs with genuine MIPS32 CP0 registers. With this change, each $(CPU)/ directory can have its own timer code. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> |
||
---|---|---|
.. | ||
cpu/mips32 | ||
include/asm | ||
lib | ||
config.mk |