mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 03:08:31 +00:00
bf4ea7ed21
Don't just define ARCH_DMA_MINALIGN but also CONFIG_SYS_CACHELINE_SIZE if it's undefined. This is needed for the xhci driver to compile. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
36 lines
715 B
C
36 lines
715 B
C
/*
|
|
* Copyright (c) 2011 The Chromium OS Authors.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __X86_CACHE_H__
|
|
#define __X86_CACHE_H__
|
|
|
|
/*
|
|
* If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
|
|
* use 64-bytes, a safe default for x86.
|
|
*/
|
|
#ifndef CONFIG_SYS_CACHELINE_SIZE
|
|
#define CONFIG_SYS_CACHELINE_SIZE 64
|
|
#endif
|
|
|
|
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
|
|
|
|
static inline void wbinvd(void)
|
|
{
|
|
asm volatile ("wbinvd" : : : "memory");
|
|
}
|
|
|
|
static inline void invd(void)
|
|
{
|
|
asm volatile("invd" : : : "memory");
|
|
}
|
|
|
|
/* Enable caches and write buffer */
|
|
void enable_caches(void);
|
|
|
|
/* Disable caches and write buffer */
|
|
void disable_caches(void);
|
|
|
|
#endif /* __X86_CACHE_H__ */
|