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Suneel Garapati 4cf56ec07f pci: pci-uclass: Add multi entry support for memory regions 
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
..
cpu sandbox: u-boot.lds: Remove bogus __bss_start symbol 2020-08-22 08:54:51 -06:00
dts pci: pci-uclass: Add multi entry support for memory regions 2020-08-25 08:01:16 +02:00
include/asm sandbox: make RAM size configurable 2020-07-09 18:57:22 -06:00
lib common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
config.mk sandbox: sdl: Move to use SDL2 2020-02-05 19:33:46 -07:00
Kconfig sandbox: make RAM size configurable 2020-07-09 18:57:22 -06:00
Makefile sandbox: Use 'extras' to specify 'head' files 2018-12-05 06:01:34 -07:00