mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 22:52:18 +00:00
7b5b934313
Add support for i.MX8X based Capricorn Giedi SoM. Supported interfaces: GPIO, ENET, eMMC, I2C, UART. Console output: U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) Trying to boot from MMC1 Load image from MMC/SD 0x3e400 U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07 CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C Model: Siemens Giedi Board: Capricorn Boot: MMC0 DRAM: 1022 MiB MMC: FSL_SDHC: 0 Loading Environment from MMC... OK In: serial@5a080000 Out: serial@5a080000 Err: serial@5a080000 Net: eth1: ethernet@5b050000 [PRIME] Autobooting in 1 seconds, press "<Esc><Esc>" to stop Signed-off-by: Anatolij Gustschin <agust@denx.de>
133 lines
1.1 KiB
Text
133 lines
1.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2019 Siemens AG
|
|
*/
|
|
|
|
&{/imx8qx-pm} {
|
|
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&mu {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&clk {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&iomuxc {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio0 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio4 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio5 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio6 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_lsio_gpio7 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_dma {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_dma_lpuart0 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_dma_lpuart2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_conn {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_conn_sdch0 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_conn_sdch1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pd_conn_sdch2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio0 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio4 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio5 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio6 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio7 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&lpuart0 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&lpuart2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc2 {
|
|
u-boot,dm-spl;
|
|
};
|