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Errata doc: https://www.ti.com/lit/pdf/sprz457 Errata ID i2331 CPSW: Device lockup when reading CPSW registers Details: A device lockup can occur during the second read of any CPSW subsystem register after any MAIN domain power on reset (POR). A MAIN domain POR occurs using the hardware MCU_PORz signal, or via software using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR. After these resets, the processor and internal bus structures may get into a state which is only recoverable with full device reset using MCU_PORz. Due to this errata, Ethernet boot should not be used on this device. Workaround(s): To avoid the lockup, a warm reset should be issued after a MAIN domain POR and before any access to the CPSW registers. The warm reset realigns internal clocks and prevents the lockup from happening. Workaround above errata by calling do_reset() in case of cold boot in order to trigger warm reset. This needs enabling SYSRESET driver in R5 SPL to enable TI SCI reset driver. Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> |
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| .. | ||
| am62ax | ||
| am62x | ||
| include/mach | ||
| j721e | ||
| j721s2 | ||
| j7200 | ||
| am62a7_init.c | ||
| am625_init.c | ||
| am642_init.c | ||
| am654_init.c | ||
| arm64-mmu.c | ||
| cache.S | ||
| common.c | ||
| common.h | ||
| config.mk | ||
| config_secure.mk | ||
| j721e_init.c | ||
| j721s2_init.c | ||
| Kconfig | ||
| lowlevel_init.S | ||
| Makefile | ||
| r5_mpu.c | ||
| security.c | ||
| sysfw-loader.c | ||
| sysfw-loader.h | ||