mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
9c7fbebe5d
8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0 LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision. A0.2 will fix the issue in ROM. But A0.1 we have to workaround it in SPL by setting LPOSCCTRL BIASCURRENT again. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
21 lines
602 B
C
21 lines
602 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 NXP
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*/
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#ifndef __ARCH_IMX8ULP_SYS_PROTO_H
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#define __ARCH_NMX8ULP_SYS_PROTO_H
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#include <asm/mach-imx/sys_proto.h>
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extern unsigned long rom_pointer[];
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ulong spl_romapi_raw_seekable_read(u32 offset, u32 size, void *buf);
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ulong spl_romapi_get_uboot_base(u32 image_offset, u32 rom_bt_dev);
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enum bt_mode get_boot_mode(void);
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int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm);
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int xrdc_config_pdac_openacc(u32 bridge, u32 index);
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enum boot_device get_boot_device(void);
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void set_lpav_qos(void);
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void load_lposc_fuse(void);
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#endif
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