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OP-TEE is very particular about how the TZC should be configured. When booting an OP-TEE payload, an incorrect TZC configuration will result in a panic. Most information can be derived from the SPL devicetree. The only information we don't have is the split between TZDRAM and shared memory. This has to be hardcoded. The rest of the configuration is fairly easy, and only requires 3 TZC regions. Configure them. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> |
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|---|---|---|
| .. | ||
| cmd_stm32prog | ||
| include/mach | ||
| boot_params.c | ||
| bsec.c | ||
| cmd_stm32key.c | ||
| config.mk | ||
| cpu.c | ||
| dram_init.c | ||
| fdt.c | ||
| Kconfig | ||
| Makefile | ||
| psci.c | ||
| pwr_regulator.c | ||
| spl.c | ||
| syscon.c | ||
| tzc400.c | ||