mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 17:28:15 +00:00
651492bfb2
The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI, CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - PCIe/NVMe/AHCI - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
90 lines
2.3 KiB
Text
90 lines
2.3 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_COUNTER_FREQUENCY=24000000
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_TEXT_BASE=0x00a00000
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_NR_DRAM_BANKS=2
|
|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-model-a"
|
|
CONFIG_ROCKCHIP_RK3568=y
|
|
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
|
|
CONFIG_SPL_SERIAL=y
|
|
CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
CONFIG_TARGET_QUARTZ64_RK3566=y
|
|
CONFIG_SPL_STACK=0x400000
|
|
CONFIG_DEBUG_UART_BASE=0xFE660000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SYS_LOAD_ADDR=0xc00800
|
|
CONFIG_PCI=y
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_AHCI=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_SPL_FIT_SIGNATURE=y
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_LEGACY_IMAGE_FORMAT=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-soquartz-model-a.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_SPL_MAX_SIZE=0x40000
|
|
CONFIG_SPL_PAD_TO=0x7f8000
|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
CONFIG_SPL_BSS_START_ADDR=0x4000000
|
|
CONFIG_SPL_BSS_MAX_SIZE=0x4000
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_ATF=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_PCI=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_PMIC=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
# CONFIG_SPL_DOS_PARTITION is not set
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_OF_LIVE=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_SCSI_AHCI=y
|
|
CONFIG_AHCI_PCI=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_GPIO_HOG=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_MISC=y
|
|
CONFIG_SUPPORT_EMMC_RPMB=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_MMC_SDHCI=y
|
|
CONFIG_MMC_SDHCI_SDMA=y
|
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
CONFIG_NVME_PCI=y
|
|
CONFIG_PCIE_DW_ROCKCHIP=y
|
|
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
|
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_DM_PMIC=y
|
|
CONFIG_PMIC_RK8XX=y
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_SCSI=y
|
|
CONFIG_DM_SCSI=y
|
|
CONFIG_BAUDRATE=1500000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550_MEM32=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_DWC3=y
|
|
CONFIG_USB_DWC3_GENERIC=y
|
|
CONFIG_ERRNO_STR=y
|