mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 06:42:56 +00:00
7e270ec3af
The 'xtfpga' board is actually a set of FPGA evaluation boards that can be configured to run an Xtensa processor. - Avnet Xilinx LX60 - Avnet Xilinx LX110 - Avnet Xilinx LX200 - Xilinx ML605 - Xilinx KC705 These boards share the same components (open-ethernet, ns16550 serial, lcd display, flash, etc.). Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
37 lines
727 B
C
37 lines
727 B
C
/*
|
|
* Cadence Tensilica xtfpga system reset driver.
|
|
*
|
|
* (C) Copyright 2016 Cadence Design Systems Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <dm.h>
|
|
#include <errno.h>
|
|
#include <sysreset.h>
|
|
#include <asm/io.h>
|
|
|
|
static int xtfpga_reset_request(struct udevice *dev, enum sysreset_t type)
|
|
{
|
|
switch (type) {
|
|
case SYSRESET_COLD:
|
|
writel(CONFIG_SYS_FPGAREG_RESET_CODE,
|
|
CONFIG_SYS_FPGAREG_RESET);
|
|
break;
|
|
default:
|
|
return -EPROTONOSUPPORT;
|
|
}
|
|
|
|
return -EINPROGRESS;
|
|
}
|
|
|
|
static struct sysreset_ops xtfpga_sysreset_ops = {
|
|
.request = xtfpga_reset_request,
|
|
};
|
|
|
|
U_BOOT_DRIVER(xtfpga_sysreset) = {
|
|
.name = "xtfpga_sysreset",
|
|
.id = UCLASS_SYSRESET,
|
|
.ops = &xtfpga_sysreset_ops,
|
|
};
|