mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 22:03:15 +00:00
ee422142f4
CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
44 lines
1.3 KiB
Makefile
44 lines
1.3 KiB
Makefile
#
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# SPDX-License-Identifier: GPL-2.0+
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#
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head-y := arch/mips/cpu/start.o
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ifeq ($(CONFIG_SPL_BUILD),y)
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ifneq ($(CONFIG_SPL_START_S_PATH),)
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head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
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endif
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endif
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libs-y += arch/mips/cpu/
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libs-y += arch/mips/lib/
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machine-$(CONFIG_SOC_AU1X00) += au1x00
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machine-$(CONFIG_ARCH_ATH79) += ath79
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machine-$(CONFIG_ARCH_BMIPS) += bmips
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machine-$(CONFIG_MACH_PIC32) += pic32
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machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
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libs-y += $(machdirs)
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PLATFORM_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
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# Optimize for MIPS architectures
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arch-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,-mips32
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arch-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,-mips32r2
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arch-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,-mips32r6
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arch-$(CONFIG_CPU_MIPS64_R1) += -march=mips64 -Wa,-mips64
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arch-$(CONFIG_CPU_MIPS64_R2) += -march=mips64r2 -Wa,-mips64r2
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arch-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,-mips64r6
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# Allow extra optimization for specific CPUs/SoCs
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tune-$(CONFIG_MIPS_TUNE_4KC) += -mtune=4kc
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tune-$(CONFIG_MIPS_TUNE_14KC) += -mtune=14kc
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tune-$(CONFIG_MIPS_TUNE_24KC) += -mtune=24kc
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tune-$(CONFIG_MIPS_TUNE_34KC) += -mtune=34kc
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tune-$(CONFIG_MIPS_TUNE_74KC) += -mtune=74kc
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# Include default header files
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cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
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PLATFORM_CPPFLAGS += $(arch-y) $(tune-y) $(cflags-y)
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