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https://github.com/AsahiLinux/u-boot
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9082eeac5d
The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib. While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
130 lines
3.2 KiB
C
130 lines
3.2 KiB
C
/*
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* RealTek PHY drivers
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* author Andy Fleming
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*
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*/
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#include <config.h>
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#include <common.h>
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#include <phy.h>
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#define PHY_AUTONEGOTIATE_TIMEOUT 5000
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/* RTL8211B PHY Status Register */
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#define MIIM_RTL8211B_PHY_STATUS 0x11
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#define MIIM_RTL8211B_PHYSTAT_SPEED 0xc000
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#define MIIM_RTL8211B_PHYSTAT_GBIT 0x8000
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#define MIIM_RTL8211B_PHYSTAT_100 0x4000
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#define MIIM_RTL8211B_PHYSTAT_DUPLEX 0x2000
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#define MIIM_RTL8211B_PHYSTAT_SPDDONE 0x0800
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#define MIIM_RTL8211B_PHYSTAT_LINK 0x0400
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/* RealTek RTL8211B */
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static int rtl8211b_config(struct phy_device *phydev)
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{
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phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
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genphy_config_aneg(phydev);
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return 0;
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}
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static int rtl8211b_parse_status(struct phy_device *phydev)
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{
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unsigned int speed;
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unsigned int mii_reg;
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mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211B_PHY_STATUS);
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if (!(mii_reg & MIIM_RTL8211B_PHYSTAT_SPDDONE)) {
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int i = 0;
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/* in case of timeout ->link is cleared */
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phydev->link = 1;
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puts("Waiting for PHY realtime link");
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while (!(mii_reg & MIIM_RTL8211B_PHYSTAT_SPDDONE)) {
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/* Timeout reached ? */
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if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
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puts(" TIMEOUT !\n");
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phydev->link = 0;
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break;
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}
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if ((i++ % 1000) == 0)
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putc('.');
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udelay(1000); /* 1 ms */
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mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
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MIIM_RTL8211B_PHY_STATUS);
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}
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puts(" done\n");
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udelay(500000); /* another 500 ms (results in faster booting) */
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} else {
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if (mii_reg & MIIM_RTL8211B_PHYSTAT_LINK)
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phydev->link = 1;
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else
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phydev->link = 0;
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}
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if (mii_reg & MIIM_RTL8211B_PHYSTAT_DUPLEX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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speed = (mii_reg & MIIM_RTL8211B_PHYSTAT_SPEED);
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switch (speed) {
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case MIIM_RTL8211B_PHYSTAT_GBIT:
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phydev->speed = SPEED_1000;
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break;
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case MIIM_RTL8211B_PHYSTAT_100:
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phydev->speed = SPEED_100;
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break;
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default:
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phydev->speed = SPEED_10;
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}
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return 0;
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}
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static int rtl8211b_startup(struct phy_device *phydev)
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{
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/* Read the Status (2x to make sure link is right) */
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genphy_update_link(phydev);
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rtl8211b_parse_status(phydev);
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return 0;
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}
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static struct phy_driver RTL8211B_driver = {
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.name = "RealTek RTL8211B",
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.uid = 0x1cc910,
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.mask = 0xfffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &rtl8211b_config,
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.startup = &rtl8211b_startup,
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.shutdown = &genphy_shutdown,
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};
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int phy_realtek_init(void)
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{
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phy_register(&RTL8211B_driver);
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return 0;
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}
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