Stefan Roese a8483505e8 arm: mvebu: Move PCI(e) MBUS window to end of RAM ... With patch 49b23e035d (pci: mvebu: Increase size of PCIe default mapping) the mapping size for each PCI(e) controller was increased from 32MiB to 128MiB. This leads to problems on boards with multiple PCIe slots / ports which are unable to map all PCIe ports, e.g. the Armada-XP theadorable: DRAM: 2 GiB (667 MHz, 64-bit, ECC not enabled) SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB Cannot add window '4:f8', conflicts with another window PCIe unable to add mbus window for mem at f0000000+08000000 Model: Marvell Armada XP theadorable This patch moves the base address for the PCI(e) memory spaces from 0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now). This gives move room and flexibility for PCI(e) mappings. Signed-off-by: Stefan Roese <sr@denx.de> Cc: VlaoMao <vlaomao@gmail.com> Tested-by: VlaoMao <vlaomao at gmail.com>		2018-11-06 13:21:13 +01:00
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config.h	Convert CONFIG_MII et al to Kconfig	2018-08-17 13:03:54 -04:00
cpu.h	arm: mvebu: Move PCI(e) MBUS window to end of RAM	2018-11-06 13:21:13 +01:00
efuse.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
gpio.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
soc.h	ARM: mach-mvebu: handle fall-back to UART boot	2018-09-19 08:59:26 +02:00