mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 19:28:36 +00:00
206f38f727
Add support for SATA. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
290 lines
8.2 KiB
C
290 lines
8.2 KiB
C
/*
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* Config file for Compulab CM-FX6 board
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*
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* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
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*
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* Author: Nikita Kiryanov <nikita@compulab.co.il>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_CM_FX6_H
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#define __CONFIG_CM_FX6_H
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#include <asm/arch/imx-regs.h>
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#include <config_distro_defaults.h>
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#include "mx6_common.h"
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/* Machine config */
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#define CONFIG_MX6
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#define CONFIG_SYS_LITTLE_ENDIAN
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#define CONFIG_MACH_TYPE 4273
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#define CONFIG_SYS_HZ 1000
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/* Display information on boot */
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_TIMESTAMP
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/* CMD */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_GREPENV
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_LOADB
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_XIMG
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMLS
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/* MMC */
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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/* RAM */
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#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Serial console */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART4_BASE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
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/* Shell */
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#define CONFIG_SYS_PROMPT "CM-FX6 # "
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* SPI flash */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_CMD_SF
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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/* Environment */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_OFFSET (768 * 1024)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel=uImage-cm-fx6\0" \
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"autoload=no\0" \
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"loadaddr=0x10800000\0" \
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"fdtaddr=0x11000000\0" \
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"console=ttymxc3,115200\0" \
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"ethprime=FEC0\0" \
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"bootscr=boot.scr\0" \
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"bootm_low=18000000\0" \
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"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
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"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
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"fdtfile=cm-fx6.dtb\0" \
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"doboot=bootm ${loadaddr}\0" \
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"loadfdt=false\0" \
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"setboottypez=setenv kernel zImage-cm-fx6;" \
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"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
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"setenv loadfdt true;\0" \
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"setboottypem=setenv kernel uImage-cm-fx6;" \
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"setenv doboot bootm ${loadaddr};" \
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"setenv loadfdt false;\0"\
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"run_eboot=echo Starting EBOOT ...; "\
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"mmc dev ${mmcdev} && " \
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"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
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"mmcdev=2\0" \
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"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
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"loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
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"mmcbootscript=echo Running bootscript from mmc ...; "\
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"source ${loadaddr}\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"root=${mmcroot} " \
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"${video}\0" \
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"mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
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"mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"run doboot\0" \
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"satadev=0\0" \
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"sataroot=/dev/sda2 rw rootwait\0" \
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"sataargs=setenv bootargs console=${console} " \
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"root=${sataroot} " \
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"${video}\0" \
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"loadsatabootscript=load sata ${satadev} ${loadaddr} ${bootscr}\0" \
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"satabootscript=echo Running bootscript from sata ...; " \
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"source ${loadaddr}\0" \
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"sataloadkernel=load sata ${satadev} ${loadaddr} ${kernel}\0" \
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"sataloadfdt=load sata ${satadev} ${fdtaddr} ${fdtfile}\0" \
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"sataboot=echo Booting from sata ...; "\
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"run sataargs; " \
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"run doboot\0" \
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"nandroot=/dev/mtdblock4 rw\0" \
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"nandrootfstype=ubifs\0" \
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"nandargs=setenv bootargs console=${console} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype} " \
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"${video}\0" \
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"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${loadaddr} 0 780000; " \
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"if ${loadfdt}; then " \
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"run nandloadfdt;" \
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"fi; " \
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"run doboot\0" \
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"boot=mmc dev ${mmcdev}; " \
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"if mmc rescan; then " \
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"if run loadmmcbootscript; then " \
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"run mmcbootscript;" \
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"else " \
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"if run mmcloadkernel; then " \
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"if ${loadfdt}; then " \
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"run mmcloadfdt;" \
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"fi;" \
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"run mmcboot;" \
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"fi;" \
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"fi;" \
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"fi;" \
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"if sata init; then " \
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"if run loadsatabootscript; then " \
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"run satabootscript;" \
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"else "\
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"if run sataloadkernel; then " \
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"if ${loadfdt}; then " \
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"run sataloadfdt; " \
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"fi;" \
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"run sataboot;" \
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"fi;" \
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"fi;" \
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"fi;" \
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"run nandboot\0"
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#define CONFIG_BOOTCOMMAND \
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"run setboottypem; run boot"
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/* SPI */
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#define CONFIG_SPI
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#define CONFIG_MXC_SPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_ATMEL
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#define CONFIG_SPI_FLASH_EON
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#define CONFIG_SPI_FLASH_GIGADEVICE
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#define CONFIG_SPI_FLASH_MACRONIX
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SPI_FLASH_SST
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#define CONFIG_SPI_FLASH_WINBOND
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/* NAND */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_CMD_NAND
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* APBH DMA is required for NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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#endif
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/* Ethernet */
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ATHEROS
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#define CONFIG_MII
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_ARP_TIMEOUT 200UL
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_NET_RETRY_COUNT 5
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/* USB */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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/* I2C */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_MXC_I2C3_SPEED 400000
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS 2
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/* SATA */
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#define CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_LIBATA
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#define CONFIG_LBA48
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#define CONFIG_DWC_AHSATA
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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/* GPIO */
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#define CONFIG_MXC_GPIO
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/* Boot */
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_LOADADDR 0x10800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SERIAL_TAG
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/* misc */
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#define CONFIG_SYS_GENERIC_BOARD
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#define CONFIG_STACKSIZE (128 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
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#define CONFIG_OF_BOARD_SETUP
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/* SPL */
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#include "imx6_spl.h"
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
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#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
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#define CONFIG_SPL_SPI_LOAD
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#endif /* __CONFIG_CM_FX6_H */
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