u-boot/arch/arm/dts/fsl-lx2160a-rdb.dts
Kuldeep Singh bd294e43dc arm: dts: lx2160a: Use flexspi in octal I/O mode
Configure RX and TX bus-width values to use flexspi in octal I/O mode.
If bus-widths are not specified, then single I/O mode is set by default.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:12:13 +05:30

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// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* NXP LX2160ARDB device tree source
*
* Author: Priyanka Jain <priyanka.jain@nxp.com>
* Sriram Dash <sriram.dash@nxp.com>
*
* Copyright 2018 NXP
*
*/
/dts-v1/;
#include "fsl-lx2160a.dtsi"
/ {
model = "NXP Layerscape LX2160ARDB Board";
compatible = "fsl,lx2160ardb", "fsl,lx2160a";
aliases {
spi0 = &fspi;
};
};
&esdhc0 {
status = "okay";
};
&esdhc1 {
status = "okay";
mmc-hs200-1_8v;
};
&fspi {
status = "okay";
mt35xu512aba0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
mt35xu512aba1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <1>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};
&i2c0 {
status = "okay";
u-boot,dm-pre-reloc;
};
&i2c4 {
status = "okay";
rtc@51 {
compatible = "pcf2127-rtc";
reg = <0x51>;
};
};
&sata0 {
status = "okay";
};
&sata1 {
status = "okay";
};
&sata2 {
status = "okay";
};
&sata3 {
status = "okay";
};