u-boot/arch/arm/cpu/armv8/fsl-layerscape/Makefile
Mingkai Hu 8281c58fd4 armv8/fsl_lsch2: Add fsl_lsch2 SoC
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:34:00 -07:00

26 lines
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Makefile

#
# Copyright 2014-2015, Freescale Semiconductor
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += cpu.o
obj-y += lowlevel.o
obj-y += soc.o
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-$(CONFIG_SPL) += spl.o
ifneq ($(CONFIG_FSL_LSCH3),)
obj-y += fsl_lsch3_speed.o
obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch3_serdes.o
else
ifneq ($(CONFIG_FSL_LSCH2),)
obj-y += fsl_lsch2_speed.o
obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o
endif
endif
ifneq ($(CONFIG_LS2085A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2085a_serdes.o
endif