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u-boot/arch/arm/mach-socfpga
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Ley Foon Tan 827e6a7e0d arm: socfpga: Add reset driver support for Arria 10 
Add reset driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00
..
include/mach arm: socfpga: Add reset driver support for Arria 10 2017-05-18 11:33:17 +02:00
board.c arm: socfpga: Introduce common board code 2015-12-20 03:36:51 +01:00
clock_manager.c arm: socfpga: Restructure clock manager driver 2017-05-18 11:33:16 +02:00
clock_manager_gen5.c arm: socfpga: Restructure clock manager driver 2017-05-18 11:33:16 +02:00
fpga_manager.c treewide: replace #include <asm/errno.h> with <linux/errno.h> 2016-09-23 17:55:42 -04:00
freeze_controller.c treewide: replace #include <asm/errno.h> with <linux/errno.h> 2016-09-23 17:55:42 -04:00
Kconfig arm: socfpga: add cyclone5 based de10-nano board 2017-04-25 12:46:44 +02:00
Makefile arm: socfpga: Add reset driver support for Arria 10 2017-05-18 11:33:17 +02:00
misc.c arm: socfpga: Restructure misc driver 2017-05-18 11:33:17 +02:00
misc_gen5.c arm: socfpga: Restructure misc driver 2017-05-18 11:33:17 +02:00
qts-filter.sh qts-filter.sh: strip DOS line endings and handle continuation lines 2016-12-06 01:45:57 +01:00
reset_manager.c arm: socfpga: Restructure reset manager driver 2017-05-18 11:33:17 +02:00
reset_manager_arria10.c arm: socfpga: Add reset driver support for Arria 10 2017-05-18 11:33:17 +02:00
reset_manager_gen5.c arm: socfpga: Restructure reset manager driver 2017-05-18 11:33:17 +02:00
scan_manager.c arm: socfpga: scan: Add code to get FPGA ID 2015-08-08 14:14:30 +02:00
spl.c arm: socfpga: Restructure clock manager driver 2017-05-18 11:33:16 +02:00
system_manager_gen5.c arm: socfpga: Restructure system manager 2017-05-18 11:33:17 +02:00
timer.c ARM: socfpga: move SoC sources to mach-socfpga 2015-05-07 05:21:12 +02:00
wrap_iocsr_config.c arm: socfpga: Switch to filtered QTS files 2015-08-23 11:56:20 +02:00
wrap_pinmux_config.c arm: socfpga: Make the pinmux table const u8 2015-08-23 11:56:20 +02:00
wrap_pll_config.c arm: socfpga: set the mpuclk divider in the Altera group register 2017-02-08 02:19:11 +01:00
wrap_sdram_config.c ddr: altera: Configuring SDRAM extra cycles timing parameters 2016-10-27 08:03:07 +02:00