u-boot/arch/arm/include/asm/arch-omap5
Nishanth Menon 0459bc30b6 ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices
OMAP5432 did go into production with AVS class0 registers which were
mutually exclusive from AVS Class 1.5 registers.

Most OMAP5-uEVM boards use the pre-production Class1.5 which has
production efuse registers set to 0. However on production devices,
these are set to valid data.

scale_vcore logic is already smart enough to detect this and use the
"Nominal voltage" on devices that do not have efuse registers populated.

On a test production device populated as follows:
MPU OPP_NOM:
=> md.l 0x04A0021C4 1
4a0021c4: 03a003e9                               ....
(0x3e9 = 1.01v) vs nom voltage of 1.06v
MPU OPP_HIGH:
=> md.l 0x04A0021C8 1
4a0021c8: 03400485                               ..@.

MM OPP_NOM:
=> md.l 0x04A0021A4 1
4a0021a4: 038003d4                               ....
(0x3d4 = 980mV) vs nom voltage of 1.025v
MM OPP_OD:
=> md.l 0x04A0021A8 1
4a0021a8: 03600403                               ..`.

CORE OPP_NOM:
=> md.l 0x04A0021D8 1
4a0021d8: 000003cf                               ....
(0x3cf = 975mV) vs nom voltage of 1.040v

Since the efuse values are'nt currently used, we do not regress on
existing pre-production samples (they continue to use nominal voltage).

But on boards that do have production samples populated, we can leverage
the optimal voltages necessary for proper operation.

Tested on:
a) 720-2644-001 OMAP5UEVM with production sample.
b) 750-2628-222(A) UEVM5432G-02 with pre-production sample.

Data based on OMAP5432 Technical reference Manual SWPU282AF (May
2012-Revised Aug 2016)

NOTE: All collaterals on OMAP5432 silicon itself seems to have been
removed from ti.com, though EVM details are still available:
http://www.ti.com/tool/OMAP5432-EVM

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-08-13 15:17:35 -04:00
..
clock.h ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices 2017-08-13 15:17:35 -04:00
cpu.h ti: wdt: omap5: Define WDT_BASE for omap5+ SoC 2017-04-08 21:32:49 -04:00
dra7xx_iodelay.h ARM: OMAP5/DRA7: Expose do_set_iodelay 2016-03-27 09:12:15 -04:00
ehci.h arm: omap5: echi: Add GPL-2.0+ SPDX-License-Identifier 2013-09-20 10:30:54 -04:00
gpio.h ARM: OMAP5+: GPIO: Add GPIO_TO_PIN() macro 2017-03-20 17:56:21 -04:00
hardware.h ARM: DRA7x/AM57xx: Get rid of CONFIG_AM57XX 2016-12-03 13:21:11 -05:00
i2c.h omap5/dra7: i2c: correct register offset for sync register 2016-07-26 08:39:23 +02:00
mem.h board/ti/dra7xx: add support for parallel NOR 2014-08-25 10:48:12 -04:00
mmc_host_def.h omap: consolidate common mmc definitions 2013-03-08 16:41:12 -05:00
mux_dra7xx.h board: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMT 2016-12-04 13:54:55 -05:00
mux_omap5.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
omap.h ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices 2017-08-13 15:17:35 -04:00
sata.h ARM: O5/dra7xx: Add SATA boot support 2014-02-19 10:47:45 -05:00
spl.h dra7x: boot: add dfu bootmode support 2016-09-27 23:30:20 +02:00
sys_proto.h arm: omap: Introduce vcores_init function 2016-06-02 21:42:18 -04:00