mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 22:03:15 +00:00
130 lines
3.2 KiB
C
130 lines
3.2 KiB
C
/*
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* Copyright (c) 2009 Wind River Systems, Inc.
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* Tom Rix <Tom.Rix@windriver.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* This file was adapted from cpu/mpc5xxx/serial.c
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*
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*/
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#include <common.h>
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#include <serial.h>
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#include <ns16550.h>
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#include <asm/arch/cpu.h>
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#include "zoom2_serial.h"
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int quad_init_dev (unsigned long base)
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{
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/*
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* The Quad UART is on the debug board.
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* Check if the debug board is attached before using the UART
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*/
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if (zoom2_debug_board_connected ()) {
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NS16550_t com_port = (NS16550_t) base;
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int baud_divisor = CONFIG_SYS_NS16550_CLK / 16 /
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CONFIG_BAUDRATE;
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/*
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* Zoom2 has a board specific initialization of its UART.
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* This generic initialization has been copied from
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* drivers/serial/ns16550.c. The macros have been expanded.
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*
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* Do the following instead of
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*
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* NS16550_init (com_port, clock_divisor);
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*/
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com_port->ier = 0x00;
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/*
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* On Zoom2 board Set pre-scalar to 1
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* CLKSEL is GND => MCR[7] is 1 => preslr is 4
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* So change the prescl to 1
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*/
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com_port->lcr = 0xBF;
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com_port->fcr |= 0x10;
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com_port->mcr &= 0x7F;
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/* This is generic ns16550.c setup */
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com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1;
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com_port->dll = 0;
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com_port->dlm = 0;
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com_port->lcr = UART_LCR_8N1;
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com_port->mcr = UART_MCR_DTR | UART_MCR_RTS;
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com_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR |
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UART_FCR_TXSR;
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com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1;
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com_port->dll = baud_divisor & 0xff;
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com_port->dlm = (baud_divisor >> 8) & 0xff;
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com_port->lcr = UART_LCR_8N1;
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}
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/*
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* We have to lie here, otherwise the board init code will hang
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* on the check
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*/
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return 0;
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}
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void quad_putc_dev (unsigned long base, const char c)
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{
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if (zoom2_debug_board_connected ()) {
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if (c == '\n')
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quad_putc_dev (base, '\r');
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NS16550_putc ((NS16550_t) base, c);
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}
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}
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void quad_puts_dev (unsigned long base, const char *s)
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{
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if (zoom2_debug_board_connected ()) {
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while ((s != NULL) && (*s != '\0'))
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quad_putc_dev (base, *s++);
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}
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}
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int quad_getc_dev (unsigned long base)
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{
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if (zoom2_debug_board_connected ())
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return NS16550_getc ((NS16550_t) base);
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else
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return 0;
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}
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int quad_tstc_dev (unsigned long base)
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{
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if (zoom2_debug_board_connected ())
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return NS16550_tstc ((NS16550_t) base);
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else
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return 0;
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}
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void quad_setbrg_dev (unsigned long base)
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{
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if (zoom2_debug_board_connected ()) {
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int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 /
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CONFIG_BAUDRATE;
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NS16550_reinit ((NS16550_t) base, clock_divisor);
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}
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}
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QUAD_INIT (0)
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QUAD_INIT (1)
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QUAD_INIT (2)
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QUAD_INIT (3)
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