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7c02bc9649
The Jetson Nano Developer Kit is a Tegra X1-based development board. It is similar to Jetson TX1 but it is not pin compatible. It features 4GB of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot used for storage. HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI Ethernet controller provides onboard network connectivity. NVMe support has also been added. Env save is at the end of QSPI (4MB-8K). A 40-pin header on the board can be used to extend the capabilities and exposed interfaces of the Jetson Nano. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
147 lines
2.4 KiB
Text
147 lines
2.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019-2020 NVIDIA Corporation <www.nvidia.com>
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*/
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/dts-v1/;
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#include "tegra210.dtsi"
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/ {
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model = "NVIDIA Jetson Nano Developer Kit";
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compatible = "nvidia,p3450-0000", "nvidia,tegra210";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
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i2c0 = "/i2c@7000d000";
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i2c2 = "/i2c@7000c400";
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i2c3 = "/i2c@7000c500";
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i2c4 = "/i2c@7000c700";
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mmc0 = "/sdhci@700b0600";
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mmc1 = "/sdhci@700b0000";
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spi0 = "/spi@70410000";
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usb0 = "/usb@7d000000";
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};
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memory {
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reg = <0x0 0x80000000 0x0 0xc0000000>;
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};
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pcie@1003000 {
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status = "okay";
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pci@1,0 {
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status = "okay";
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};
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pci@2,0 {
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status = "okay";
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ethernet@0,0 {
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reg = <0x000000 0 0 0 0>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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};
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serial@70006000 {
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status = "okay";
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};
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padctl@7009f000 {
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pinctrl-0 = <&padctl_default>;
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pinctrl-names = "default";
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padctl_default: pinmux {
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xusb {
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nvidia,lanes = "otg-1", "otg-2";
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nvidia,function = "xusb";
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nvidia,iddq = <0>;
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};
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usb3 {
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nvidia,lanes = "pcie-5", "pcie-6";
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nvidia,function = "usb3";
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nvidia,iddq = <0>;
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};
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pcie-x1 {
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nvidia,lanes = "pcie-0";
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nvidia,function = "pcie-x1";
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nvidia,iddq = <0>;
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};
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pcie-x4 {
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nvidia,lanes = "pcie-1", "pcie-2",
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"pcie-3", "pcie-4";
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nvidia,function = "pcie-x4";
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nvidia,iddq = <0>;
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};
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sata {
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nvidia,lanes = "sata-0";
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nvidia,function = "sata";
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nvidia,iddq = <0>;
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};
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};
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};
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sdhci@700b0000 {
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status = "okay";
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cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
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power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
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bus-width = <4>;
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};
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sdhci@700b0600 {
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status = "okay";
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bus-width = <8>;
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non-removable;
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};
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i2c@7000c400 {
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status = "okay";
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clock-frequency = <400000>;
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};
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i2c@7000c500 {
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status = "okay";
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clock-frequency = <400000>;
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};
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i2c@7000c700 {
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status = "okay";
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clock-frequency = <400000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <400000>;
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};
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spi@70410000 {
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status = "okay";
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spi-max-frequency = <80000000>;
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};
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usb@7d000000 {
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status = "okay";
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dr_mode = "peripheral";
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg = <0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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};
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