mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 00:47:26 +00:00
e8e9c6f484
[trini: Migrate CONFIG_EXYNOS7420 as part of merging, so espresso7420 still builds] Signed-off-by: Tom Rini <trini@konsulko.com>
90 lines
2.7 KiB
C
90 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Configuration settings for the Espresso7420 board.
|
|
* Copyright (C) 2016 Samsung Electronics
|
|
* Thomas Abraham <thomas.ab@samsung.com>
|
|
*/
|
|
|
|
#ifndef __CONFIG_EXYNOS7420_COMMON_H
|
|
#define __CONFIG_EXYNOS7420_COMMON_H
|
|
|
|
/* High Level Configuration Options */
|
|
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
|
|
#define CONFIG_S5P
|
|
|
|
#include <asm/arch/cpu.h> /* get chip and board defs */
|
|
#include <linux/sizes.h>
|
|
|
|
/* Miscellaneous configurable options */
|
|
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
|
#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
|
|
|
|
/* Boot Argument Buffer Size */
|
|
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
|
|
|
/* select serial console configuration */
|
|
|
|
/* Timer input clock frequency */
|
|
#define COUNTER_FREQUENCY 24000000
|
|
|
|
/* Device Tree */
|
|
#define CONFIG_DEVICE_TREE_LIST "exynos7420-espresso7420"
|
|
|
|
/* IRAM Layout */
|
|
#define CONFIG_IRAM_BASE 0x02100000
|
|
#define CONFIG_IRAM_SIZE 0x58000
|
|
#define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE)
|
|
#define CPU_RELEASE_ADDR secondary_boot_addr
|
|
|
|
/* select serial console configuration */
|
|
|
|
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
|
|
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
|
|
#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
|
|
#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
|
|
#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
|
|
#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
|
|
#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
|
|
#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
|
|
#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
|
|
#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
|
|
|
|
/* Configuration of ENV Blocks */
|
|
|
|
#define BOOT_TARGET_DEVICES(func) \
|
|
func(MMC, mmc, 1) \
|
|
func(MMC, mmc, 0) \
|
|
|
|
#ifndef MEM_LAYOUT_ENV_SETTINGS
|
|
#define MEM_LAYOUT_ENV_SETTINGS \
|
|
"bootm_size=0x10000000\0" \
|
|
"kernel_addr_r=0x42000000\0" \
|
|
"fdt_addr_r=0x43000000\0" \
|
|
"ramdisk_addr_r=0x43300000\0" \
|
|
"scriptaddr=0x50000000\0" \
|
|
"pxefile_addr_r=0x51000000\0"
|
|
#endif
|
|
|
|
#ifndef EXYNOS_DEVICE_SETTINGS
|
|
#define EXYNOS_DEVICE_SETTINGS \
|
|
"stdin=serial\0" \
|
|
"stdout=serial\0" \
|
|
"stderr=serial\0"
|
|
#endif
|
|
|
|
#ifndef EXYNOS_FDTFILE_SETTING
|
|
#define EXYNOS_FDTFILE_SETTING
|
|
#endif
|
|
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
EXYNOS_DEVICE_SETTINGS \
|
|
EXYNOS_FDTFILE_SETTING \
|
|
MEM_LAYOUT_ENV_SETTINGS
|
|
|
|
#endif /* __CONFIG_EXYNOS7420_COMMON_H */
|