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45ffa122f2
DECLARE_GLOBAL_DATA_PTR is missing which causes 64-bit build error. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/*
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* (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/e820.h>
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DECLARE_GLOBAL_DATA_PTR;
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unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
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{
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entries[0].addr = 0;
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entries[0].size = ISA_START_ADDRESS;
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entries[0].type = E820_RAM;
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entries[1].addr = ISA_START_ADDRESS;
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entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
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entries[1].type = E820_RESERVED;
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/*
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* since we use memalign(malloc) to allocate high memory for
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* storing ACPI tables, we need to reserve them in e820 tables,
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* otherwise kernel will reclaim them and data will be corrupted
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*/
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entries[2].addr = ISA_END_ADDRESS;
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entries[2].size = gd->relocaddr - TOTAL_MALLOC_LEN - ISA_END_ADDRESS;
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entries[2].type = E820_RAM;
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/* for simplicity, reserve entire malloc space */
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entries[3].addr = gd->relocaddr - TOTAL_MALLOC_LEN;
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entries[3].size = TOTAL_MALLOC_LEN;
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entries[3].type = E820_RESERVED;
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entries[4].addr = gd->relocaddr;
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entries[4].size = gd->ram_size - gd->relocaddr;
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entries[4].type = E820_RESERVED;
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entries[5].addr = CONFIG_PCIE_ECAM_BASE;
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entries[5].size = CONFIG_PCIE_ECAM_SIZE;
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entries[5].type = E820_RESERVED;
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return 6;
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}
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