mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
9d74f03460
There are many places in the U-Boot source tree which refer to CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT that is currently defined in coreboot.h. Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch to board configuration file to build U-Boot later. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
359 lines
9.5 KiB
Text
359 lines
9.5 KiB
Text
menu "x86 architecture"
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depends on X86
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config SYS_ARCH
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default "x86"
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config USE_PRIVATE_LIBGCC
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default y
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choice
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prompt "Target select"
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config TARGET_COREBOOT
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bool "Support coreboot"
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help
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This target is used for running U-Boot on top of Coreboot. In
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this case Coreboot does the early inititalisation, and U-Boot
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takes over once the RAM, video and CPU are fully running.
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U-Boot is loaded as a fallback payload from Coreboot, in
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Coreboot terminology. This method was used for the Chromebook
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Pixel when launched.
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config TARGET_CHROMEBOOK_LINK
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bool "Support Chromebook link"
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help
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This is the Chromebook Pixel released in 2013. It uses an Intel
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i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
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SDRAM. It has a Panther Point platform controller hub, PCIe
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WiFi and Bluetooth. It also includes a 720p webcam, USB SD
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reader, microphone and speakers, display port and 32GB SATA
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solid state drive. There is a Chrome OS EC connected on LPC,
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and it provides a 2560x1700 high resolution touch-enabled LCD
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display.
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config TARGET_CROWNBAY
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bool "Support Intel Crown Bay CRB"
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help
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This is the Intel Crown Bay Customer Reference Board. It contains
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the Intel Atom Processor E6xx populated on the COM Express module
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with 1GB DDR2 soldered down memory and a carrier board with the
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Intel Platform Controller Hub EG20T, other system components and
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peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
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endchoice
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config RAMBASE
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hex
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default 0x100000
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config XIP_ROM_SIZE
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hex
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depends on X86_RESET_VECTOR
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default ROM_SIZE
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config CPU_ADDR_BITS
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int
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default 36
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config HPET_ADDRESS
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hex
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default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
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config SMM_TSEG
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bool
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default n
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config SMM_TSEG_SIZE
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hex
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config X86_RESET_VECTOR
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bool
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default n
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config SYS_X86_START16
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hex
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depends on X86_RESET_VECTOR
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default 0xfffff800
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config BOARD_ROMSIZE_KB_512
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bool
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config BOARD_ROMSIZE_KB_1024
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bool
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config BOARD_ROMSIZE_KB_2048
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bool
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config BOARD_ROMSIZE_KB_4096
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bool
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config BOARD_ROMSIZE_KB_8192
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bool
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config BOARD_ROMSIZE_KB_16384
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bool
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choice
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prompt "ROM chip size"
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depends on X86_RESET_VECTOR
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default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
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default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
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default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
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default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
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default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
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default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
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help
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Select the size of the ROM chip you intend to flash U-Boot on.
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The build system will take care of creating a u-boot.rom file
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of the matching size.
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config UBOOT_ROMSIZE_KB_512
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bool "512 KB"
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help
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Choose this option if you have a 512 KB ROM chip.
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config UBOOT_ROMSIZE_KB_1024
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bool "1024 KB (1 MB)"
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help
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Choose this option if you have a 1024 KB (1 MB) ROM chip.
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config UBOOT_ROMSIZE_KB_2048
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bool "2048 KB (2 MB)"
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help
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Choose this option if you have a 2048 KB (2 MB) ROM chip.
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config UBOOT_ROMSIZE_KB_4096
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bool "4096 KB (4 MB)"
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help
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Choose this option if you have a 4096 KB (4 MB) ROM chip.
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config UBOOT_ROMSIZE_KB_8192
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bool "8192 KB (8 MB)"
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help
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Choose this option if you have a 8192 KB (8 MB) ROM chip.
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config UBOOT_ROMSIZE_KB_16384
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bool "16384 KB (16 MB)"
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help
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Choose this option if you have a 16384 KB (16 MB) ROM chip.
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endchoice
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# Map the config names to an integer (KB).
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config UBOOT_ROMSIZE_KB
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int
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default 512 if UBOOT_ROMSIZE_KB_512
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default 1024 if UBOOT_ROMSIZE_KB_1024
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default 2048 if UBOOT_ROMSIZE_KB_2048
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default 4096 if UBOOT_ROMSIZE_KB_4096
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default 8192 if UBOOT_ROMSIZE_KB_8192
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default 16384 if UBOOT_ROMSIZE_KB_16384
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# Map the config names to a hex value (bytes).
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config ROM_SIZE
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hex
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default 0x80000 if UBOOT_ROMSIZE_KB_512
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default 0x100000 if UBOOT_ROMSIZE_KB_1024
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default 0x200000 if UBOOT_ROMSIZE_KB_2048
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default 0x400000 if UBOOT_ROMSIZE_KB_4096
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default 0x800000 if UBOOT_ROMSIZE_KB_8192
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default 0xc00000 if UBOOT_ROMSIZE_KB_12288
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default 0x1000000 if UBOOT_ROMSIZE_KB_16384
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config HAVE_INTEL_ME
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bool "Platform requires Intel Management Engine"
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help
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Newer higher-end devices have an Intel Management Engine (ME)
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which is a very large binary blob (typically 1.5MB) which is
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required for the platform to work. This enforces a particular
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SPI flash format. You will need to supply the me.bin file in
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your board directory.
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config X86_RAMTEST
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bool "Perform a simple RAM test after SDRAM initialisation"
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help
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If there is something wrong with SDRAM then the platform will
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often crash within U-Boot or the kernel. This option enables a
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very simple RAM test that quickly checks whether the SDRAM seems
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to work correctly. It is not exhaustive but can save time by
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detecting obvious failures.
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config MARK_GRAPHICS_MEM_WRCOMB
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bool "Mark graphics memory as write-combining."
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default n
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help
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The graphics performance may increase if the graphics
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memory is set as write-combining cache type. This option
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enables marking the graphics memory as write-combining.
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menu "Display"
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config FRAMEBUFFER_SET_VESA_MODE
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prompt "Set framebuffer graphics resolution"
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bool
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help
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Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
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choice
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prompt "framebuffer graphics resolution"
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default FRAMEBUFFER_VESA_MODE_117
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depends on FRAMEBUFFER_SET_VESA_MODE
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help
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This option sets the resolution used for the coreboot framebuffer (and
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bootsplash screen).
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config FRAMEBUFFER_VESA_MODE_100
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bool "640x400 256-color"
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config FRAMEBUFFER_VESA_MODE_101
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bool "640x480 256-color"
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config FRAMEBUFFER_VESA_MODE_102
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bool "800x600 16-color"
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config FRAMEBUFFER_VESA_MODE_103
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bool "800x600 256-color"
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config FRAMEBUFFER_VESA_MODE_104
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bool "1024x768 16-color"
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config FRAMEBUFFER_VESA_MODE_105
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bool "1024x7686 256-color"
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config FRAMEBUFFER_VESA_MODE_106
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bool "1280x1024 16-color"
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config FRAMEBUFFER_VESA_MODE_107
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bool "1280x1024 256-color"
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config FRAMEBUFFER_VESA_MODE_108
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bool "80x60 text"
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config FRAMEBUFFER_VESA_MODE_109
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bool "132x25 text"
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config FRAMEBUFFER_VESA_MODE_10A
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bool "132x43 text"
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config FRAMEBUFFER_VESA_MODE_10B
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bool "132x50 text"
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config FRAMEBUFFER_VESA_MODE_10C
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bool "132x60 text"
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config FRAMEBUFFER_VESA_MODE_10D
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bool "320x200 32k-color (1:5:5:5)"
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config FRAMEBUFFER_VESA_MODE_10E
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bool "320x200 64k-color (5:6:5)"
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config FRAMEBUFFER_VESA_MODE_10F
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bool "320x200 16.8M-color (8:8:8)"
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config FRAMEBUFFER_VESA_MODE_110
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bool "640x480 32k-color (1:5:5:5)"
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config FRAMEBUFFER_VESA_MODE_111
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bool "640x480 64k-color (5:6:5)"
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config FRAMEBUFFER_VESA_MODE_112
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bool "640x480 16.8M-color (8:8:8)"
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config FRAMEBUFFER_VESA_MODE_113
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bool "800x600 32k-color (1:5:5:5)"
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config FRAMEBUFFER_VESA_MODE_114
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bool "800x600 64k-color (5:6:5)"
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config FRAMEBUFFER_VESA_MODE_115
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bool "800x600 16.8M-color (8:8:8)"
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config FRAMEBUFFER_VESA_MODE_116
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bool "1024x768 32k-color (1:5:5:5)"
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config FRAMEBUFFER_VESA_MODE_117
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bool "1024x768 64k-color (5:6:5)"
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config FRAMEBUFFER_VESA_MODE_118
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bool "1024x768 16.8M-color (8:8:8)"
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config FRAMEBUFFER_VESA_MODE_119
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bool "1280x1024 32k-color (1:5:5:5)"
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config FRAMEBUFFER_VESA_MODE_11A
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bool "1280x1024 64k-color (5:6:5)"
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config FRAMEBUFFER_VESA_MODE_11B
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bool "1280x1024 16.8M-color (8:8:8)"
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config FRAMEBUFFER_VESA_MODE_USER
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bool "Manually select VESA mode"
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endchoice
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# Map the config names to an integer (KB).
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config FRAMEBUFFER_VESA_MODE
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prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
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hex
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default 0x100 if FRAMEBUFFER_VESA_MODE_100
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default 0x101 if FRAMEBUFFER_VESA_MODE_101
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default 0x102 if FRAMEBUFFER_VESA_MODE_102
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default 0x103 if FRAMEBUFFER_VESA_MODE_103
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default 0x104 if FRAMEBUFFER_VESA_MODE_104
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default 0x105 if FRAMEBUFFER_VESA_MODE_105
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default 0x106 if FRAMEBUFFER_VESA_MODE_106
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default 0x107 if FRAMEBUFFER_VESA_MODE_107
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default 0x108 if FRAMEBUFFER_VESA_MODE_108
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default 0x109 if FRAMEBUFFER_VESA_MODE_109
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default 0x10A if FRAMEBUFFER_VESA_MODE_10A
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default 0x10B if FRAMEBUFFER_VESA_MODE_10B
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default 0x10C if FRAMEBUFFER_VESA_MODE_10C
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default 0x10D if FRAMEBUFFER_VESA_MODE_10D
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default 0x10E if FRAMEBUFFER_VESA_MODE_10E
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default 0x10F if FRAMEBUFFER_VESA_MODE_10F
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default 0x110 if FRAMEBUFFER_VESA_MODE_110
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default 0x111 if FRAMEBUFFER_VESA_MODE_111
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default 0x112 if FRAMEBUFFER_VESA_MODE_112
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default 0x113 if FRAMEBUFFER_VESA_MODE_113
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default 0x114 if FRAMEBUFFER_VESA_MODE_114
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default 0x115 if FRAMEBUFFER_VESA_MODE_115
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default 0x116 if FRAMEBUFFER_VESA_MODE_116
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default 0x117 if FRAMEBUFFER_VESA_MODE_117
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default 0x118 if FRAMEBUFFER_VESA_MODE_118
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default 0x119 if FRAMEBUFFER_VESA_MODE_119
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default 0x11A if FRAMEBUFFER_VESA_MODE_11A
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default 0x11B if FRAMEBUFFER_VESA_MODE_11B
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default 0x117 if FRAMEBUFFER_VESA_MODE_USER
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endmenu
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config TSC_CALIBRATION_BYPASS
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bool "Bypass Time-Stamp Counter (TSC) calibration"
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default n
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help
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By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
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running frequency via Model-Specific Register (MSR) and Programmable
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Interval Timer (PIT). If the calibration does not work on your board,
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select this option and provide a hardcoded TSC running frequency with
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CONFIG_TSC_FREQ_IN_MHZ below.
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Normally this option should be turned on in a simulation environment
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like qemu.
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config TSC_FREQ_IN_MHZ
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int "Time-Stamp Counter (TSC) running frequency in MHz"
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depends on TSC_CALIBRATION_BYPASS
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default 1000
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help
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The running frequency in MHz of Time-Stamp Counter (TSC).
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source "arch/x86/cpu/coreboot/Kconfig"
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source "arch/x86/cpu/ivybridge/Kconfig"
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source "arch/x86/cpu/queensbay/Kconfig"
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source "board/coreboot/coreboot/Kconfig"
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source "board/google/chromebook_link/Kconfig"
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source "board/intel/crownbay/Kconfig"
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endmenu
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