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According to the latest 8572 UM, the DDR3 controller is expanding the bit mask, and we use the extend ACTTOPRE mode when tRAS more than 19 MCLK. Signed-off-by: Dave Liu <daveliu@freescale.com> |
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.. | ||
common_timing_params.h | ||
ctrl_regs.c | ||
ddr.h | ||
ddr1_dimm_params.c | ||
ddr2_dimm_params.c | ||
lc_common_dimm_params.c | ||
main.c | ||
Makefile | ||
options.c | ||
util.c |