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https://github.com/AsahiLinux/u-boot
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8069821fc2
Most armv8 systems have PSCI support enabled in EL3, either through ARM Trusted Firmware or other firmware. On these systems, we do not need to implement system reset manually, but can instead rely on higher level firmware to deal with it. The exclude list seems excessive right now, but NXP is working on providing an in-tree PSCI implementation, so that all NXP systems can eventually use PSCI as well. Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: fix meson] Reviewed-by: Simon Glass <sjg@chromium.org>
121 lines
2.3 KiB
C
121 lines
2.3 KiB
C
/**
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* (C) Copyright 2014, Cavium Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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**/
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#include <asm-offsets.h>
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#include <config.h>
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#include <version.h>
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#include <asm/macro.h>
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#include <asm/psci.h>
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#include <asm/system.h>
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/*
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* Issue the hypervisor call
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*
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* x0~x7: input arguments
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* x0~x3: output arguments
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*/
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static void hvc_call(struct pt_regs *args)
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{
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asm volatile(
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"ldr x0, %0\n"
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"ldr x1, %1\n"
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"ldr x2, %2\n"
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"ldr x3, %3\n"
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"ldr x4, %4\n"
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"ldr x5, %5\n"
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"ldr x6, %6\n"
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"ldr x7, %7\n"
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"hvc #0\n"
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"str x0, %0\n"
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"str x1, %1\n"
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"str x2, %2\n"
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"str x3, %3\n"
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: "+m" (args->regs[0]), "+m" (args->regs[1]),
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"+m" (args->regs[2]), "+m" (args->regs[3])
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: "m" (args->regs[4]), "m" (args->regs[5]),
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"m" (args->regs[6]), "m" (args->regs[7])
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: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
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"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
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"x16", "x17");
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}
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/*
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* void smc_call(arg0, arg1...arg7)
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*
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* issue the secure monitor call
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*
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* x0~x7: input arguments
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* x0~x3: output arguments
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*/
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void smc_call(struct pt_regs *args)
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{
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asm volatile(
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"ldr x0, %0\n"
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"ldr x1, %1\n"
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"ldr x2, %2\n"
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"ldr x3, %3\n"
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"ldr x4, %4\n"
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"ldr x5, %5\n"
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"ldr x6, %6\n"
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"smc #0\n"
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"str x0, %0\n"
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"str x1, %1\n"
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"str x2, %2\n"
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"str x3, %3\n"
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: "+m" (args->regs[0]), "+m" (args->regs[1]),
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"+m" (args->regs[2]), "+m" (args->regs[3])
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: "m" (args->regs[4]), "m" (args->regs[5]),
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"m" (args->regs[6])
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: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
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"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
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"x16", "x17");
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}
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/*
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* For now, all systems we support run at least in EL2 and thus
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* trigger PSCI calls to EL3 using SMC. If anyone ever wants to
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* use PSCI on U-Boot running below a hypervisor, please detect
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* this and set the flag accordingly.
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*/
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static const bool use_smc_for_psci = true;
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void __noreturn psci_system_reset(void)
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{
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struct pt_regs regs;
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regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
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if (use_smc_for_psci)
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smc_call(®s);
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else
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hvc_call(®s);
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while (1)
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;
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}
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void __noreturn psci_system_off(void)
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{
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struct pt_regs regs;
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regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_OFF;
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if (use_smc_for_psci)
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smc_call(®s);
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else
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hvc_call(®s);
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while (1)
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;
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}
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#ifdef CONFIG_PSCI_RESET
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void reset_misc(void)
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{
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psci_system_reset();
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}
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#endif /* CONFIG_PSCI_RESET */
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