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https://github.com/AsahiLinux/u-boot
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6c993815bb
Following the same updates that were done to the fixed phy driver, use ofnode_ APIs instead of fdt_ APIs so that the Xilinx PHY driver can support live DT. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
144 lines
3.2 KiB
C
144 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Xilinx GMII2RGMII phy driver
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*
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* Copyright (C) 2018 Xilinx, Inc.
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <phy.h>
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#include <asm/global_data.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define ZYNQ_GMII2RGMII_REG 0x10
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#define ZYNQ_GMII2RGMII_SPEED_MASK (BMCR_SPEED1000 | BMCR_SPEED100)
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static int xilinxgmiitorgmii_config(struct phy_device *phydev)
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{
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ofnode node = phy_get_ofnode(phydev);
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struct phy_device *ext_phydev;
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struct ofnode_phandle_args phandle;
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int ext_phyaddr = -1;
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int ret;
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debug("%s\n", __func__);
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if (!ofnode_valid(node))
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return -EINVAL;
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phydev->addr = ofnode_read_u32_default(node, "reg", -1);
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ret = ofnode_parse_phandle_with_args(node, "phy-handle",
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NULL, 0, 0, &phandle);
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if (ret)
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return ret;
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ext_phyaddr = ofnode_read_u32_default(phandle.node, "reg", -1);
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ext_phydev = phy_find_by_mask(phydev->bus,
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1 << ext_phyaddr,
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PHY_INTERFACE_MODE_RGMII);
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if (!ext_phydev) {
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printf("%s, No external phy device found\n", __func__);
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return -EINVAL;
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}
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ext_phydev->node = phandle.node;
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phydev->priv = ext_phydev;
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debug("%s, gmii2rgmmi:0x%x, extphy:0x%x\n", __func__, phydev->addr,
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ext_phyaddr);
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if (ext_phydev->drv->config)
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ext_phydev->drv->config(ext_phydev);
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return 0;
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}
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static int xilinxgmiitorgmii_extread(struct phy_device *phydev, int addr,
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int devaddr, int regnum)
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{
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struct phy_device *ext_phydev = phydev->priv;
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debug("%s\n", __func__);
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if (ext_phydev->drv->readext)
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ext_phydev->drv->readext(ext_phydev, addr, devaddr, regnum);
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return 0;
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}
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static int xilinxgmiitorgmii_extwrite(struct phy_device *phydev, int addr,
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int devaddr, int regnum, u16 val)
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{
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struct phy_device *ext_phydev = phydev->priv;
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debug("%s\n", __func__);
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if (ext_phydev->drv->writeext)
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ext_phydev->drv->writeext(ext_phydev, addr, devaddr, regnum,
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val);
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return 0;
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}
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static int xilinxgmiitorgmii_startup(struct phy_device *phydev)
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{
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u16 val = 0;
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struct phy_device *ext_phydev = phydev->priv;
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debug("%s\n", __func__);
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ext_phydev->dev = phydev->dev;
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if (ext_phydev->drv->startup)
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ext_phydev->drv->startup(ext_phydev);
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val = phy_read(phydev, phydev->addr, ZYNQ_GMII2RGMII_REG);
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val &= ~ZYNQ_GMII2RGMII_SPEED_MASK;
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if (ext_phydev->speed == SPEED_1000)
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val |= BMCR_SPEED1000;
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else if (ext_phydev->speed == SPEED_100)
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val |= BMCR_SPEED100;
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phy_write(phydev, phydev->addr, ZYNQ_GMII2RGMII_REG, val |
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BMCR_FULLDPLX);
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phydev->duplex = ext_phydev->duplex;
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phydev->speed = ext_phydev->speed;
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phydev->link = ext_phydev->link;
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return 0;
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}
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static int xilinxgmiitorgmii_probe(struct phy_device *phydev)
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{
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debug("%s\n", __func__);
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if (phydev->interface != PHY_INTERFACE_MODE_GMII) {
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printf("Incorrect interface type\n");
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return -EINVAL;
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}
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phydev->flags |= PHY_FLAG_BROKEN_RESET;
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return 0;
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}
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static struct phy_driver gmii2rgmii_driver = {
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.name = "XILINX GMII2RGMII",
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.uid = PHY_GMII2RGMII_ID,
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.mask = 0xffffffff,
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.features = PHY_GBIT_FEATURES,
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.probe = xilinxgmiitorgmii_probe,
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.config = xilinxgmiitorgmii_config,
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.startup = xilinxgmiitorgmii_startup,
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.writeext = xilinxgmiitorgmii_extwrite,
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.readext = xilinxgmiitorgmii_extread,
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};
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int phy_xilinx_gmii2rgmii_init(void)
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{
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phy_register(&gmii2rgmii_driver);
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return 0;
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}
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