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The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> |
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| cpu | ||
| dts | ||
| imx-common | ||
| include | ||
| lib | ||
| mvebu-common | ||
| config.mk | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||